ART1 and ARTMAP VLSI Circuit Implementation

  • Teresa Serrano-Gotarredona
  • Bernabé Linares-Barranco
  • Andreas G. Andreou
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 456)

Abstract

Two types of neural hardware engineers can be distinguished. The first designs “general purpose” hardware accelerators or systems that speed up neural algorithms running on conventional computers [Mauduit, 1992], [Jones, 1991], [Ramacher, 1991]. This kind of hardware allows considerable flexibility in the topology and operations of the neural systems. In this way algorithm researchers have a powerful tool to further develop neural algorithms and industry engineers have some attractive chips that significantly speed up their neural commercial products. The second type of hardware engineers are those who design a real-time system for a specific application. They must select the best-suited algorithm and map it into hardware. This achieves a close-to-optimum efficient hardware for a limited range of applications. The work described in this book falls into this second category of hardware engineering. The specific application is real-time clustering of input patterns.

Keywords

Assure Expense Lution Reso Opera Tions 

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Copyright information

© Springer Science+Business Media New York 1998

Authors and Affiliations

  • Teresa Serrano-Gotarredona
    • 1
  • Bernabé Linares-Barranco
    • 1
  • Andreas G. Andreou
    • 2
  1. 1.National Microelectronics CenterSevillaSpain
  2. 2.The Johns Hopkins UniversityUSA

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