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Software-Defined Radio Receiver Architecture and RF-Analog Front-End Circuits

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Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio

Abstract

Wireless bands and services are proliferating across the world. Every six months approximately, a new use for wireless appears, often leading to a new standard. Manufacturers of mobile handsets have a hard time keeping up, because the end user wants to access an increasing number of services from a single handset, and have it adapt to global roaming. In the face of this proliferation a universal software-defined radio (SDR) which can communicate over all bands and standards is in high demand. This chapter covers SDR receievrs (SDR-RX). First an overview of prior SDR receiver (SDR-RX) developments is presented. Then a novel architecture for low power SDR-RX, partly evolved from prior SDR works, is described. A CMOS prototype implementation which covers the 0.5 to 6 GHz spectrum and can tune to a wide range of narrowband and wideband modulations is presented. Main circuit blocks of this SDR-RX including the programmable anti-aliasing analog filter, wideband LNA and high linearity harmonic-rejection mixer are presented. Finally the areas where further performance improvement is needed are highlighted. Due to high flexibility and close similarity to the tried and true narrowband receivers, it is foreseeable that this architecture can yield itself to be widely used in future low power SDR-RX products.

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Notes

  1. 1.

    Accompanied by RF preselect filter, such RF samplers have been successfully implemented for fixed frequency narrowband receivers [17].

  2. 2.

    Channel of interest after downconversion lies at DC.

References

  1. J. Mitola, “The Software Radio Architecture,” IEEE Communications Mag., vol. 33, no. 5, pp. 26–38, 1995.

    Article  Google Scholar 

  2. T. Hentschel and G. Fettweis, “The Digital Front-End: Bridge between RF and Baseband Processing,” in Software Defined Radio: Enabling Technologies, W. Tuttlebee, Ed. Chichester, UK: Wiley, pp. 151–198, 2002.

    Google Scholar 

  3. T. Hentschel, M. Henker, and G. Fettweis, “The Digital Front-End of Software Radio Terminals,” IEEE Communications Mag., vol. 6, pp. 40–46, 1999.

    Article  Google Scholar 

  4. K. Madani and et al, “Configurable Radio with Advanced Software Techniques (CAST)-Initial Concepts,” IST Mobile Communications Summit, Galway, Ireland, October, 2000.

    Google Scholar 

  5. S. Colsell and et al, “A Comparative Study of Reconfigurable Digital and Analog Technologies for Future Mobile Communication Systems,” IEE 3G2001, London, March, 2001.

    Google Scholar 

  6. D. Lund and et al, “A New Development System for Reconfigurable Digital Signal Processing,” IEE 3G, 2000.

    Google Scholar 

  7. ——, “Characterising Software Control of the Physical Reconfigurable Radio Subsystems,” 1st mobile summit, Barcelona, Spain, September, 2001.

    Google Scholar 

  8. P. Master and B. Plunkett, “Adaptive Computing IC Technology for 3G Software-Defined Mobile Devices,” in Software Defined Radio: Enabling Technologies, W. Tuttlebee, Ed. Chichester, UK: Wiley, pp. 257–289, 2002.

    Google Scholar 

  9. K. Moessner, “Protocols and Network Aspects of SDR,” in Software Defined Radio: Enabling Technologies, W. Tuttlebee, Ed. Chichester, UK: Wiley, pp. 339–365, 2002.

    Google Scholar 

  10. A. Abidi, “The Path to the Software-Defined Radio Receiver,” IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 954–966, 2007.

    Article  Google Scholar 

  11. N. C. Davies, “A High Performance HF Software Radio,” Eighth Intl. Conf. on HF Radio Systems and Techniques, pp. 249–256, 2000.

    Google Scholar 

  12. R. Bagheri, “An 800-MHz to 6-GHz CMOS Software-Defined-Radio Receiver for Mobile Terminals,” Ph.D. dissertation, University of California, Los Angeles, 2007.

    Google Scholar 

  13. R. H. Walden, “Analog-to-Digital Converter Survey and Analysis,” IEEE Journal of Selected Areas in Communications, vol. 17, no. 5, pp. 539–550, 1999.

    Article  Google Scholar 

  14. T. K. H. Yoshida, S. Otaka and H. Tsurumi, “A Software Defined Radio Receiver Using the Direct Conversion Principle: Implementation and Evaluation,” IEEE Intl. Symp. Personal, Indoor and Mobile Radio Communications, vol. 2, pp. 1044–1048, 2000.

    Google Scholar 

  15. A. A. Abidi, “Direct-Conversion Radio Transceivers for Digital Communications,” IEEE Journal of Solid-State Circuits, vol. 30, no. 12, pp. 1399–1410, 1995.

    Article  Google Scholar 

  16. Y. S. Poberezhskiy, “Digital Radio Receivers (in Russian),” Moscow, Russia: Radio and Communications, 1987.

    Google Scholar 

  17. K. Muhammad and et al, “A Discrete Time Quad-Band GSM/GPRS Receiver in a 90nm Digital CMOS Process,” IEEE Custom Integrated Circuits Conference, pp. 804–807, 2005.

    Google Scholar 

  18. J. Yuan, “A Charge Sampling Mixer with Embedded Filter Function for Wireless Applications,” In 2nd Intl. Conf. on Microwave and Milimeter Wave Technology, Beijing, China, pp. 315–318, 2000.

    Google Scholar 

  19. A. Mirzaei, S. Chehrazi, R. Bagheri, and A. A. Abidi, “Analysis of First-Order Anti-Aliasing Integration Sampler,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 55, no. 10, pp. 2994–3005, 2008.

    Article  MathSciNet  Google Scholar 

  20. B. Razavi, RF Microelectronics, 2nd ed. Prentice Hall, 1998.

    Google Scholar 

  21. A. Mirzaei, “Clock Programmable IF Circuits for CMOS Software Defined Radio Receiver and Precise Quadrature Oscillators,” Ph.D. dissertation, University of California, Los Angeles, 2006.

    Google Scholar 

  22. B. M. Ballweber, R. Gupta, and D. J. Allstot, “A Fully Integrated 0.5–5.5-GHz CMOS Distributed Amplifier,” IEEE Journal of Solid-State Circuits, vol. 35, no. 2, p. 231–239, 2000.

    Google Scholar 

  23. R. C. Liu, K.-L. Deng, and H.Wang, “A 0.622 GHz Broadband CMOS Distributed Amplifier,” in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp., p. 103–106, 2003.

    Google Scholar 

  24. F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Wide-Band CMOS Low-Noise Amplifier Exploiting Thermal Noise Canceling,” IEEE Journal of Solid-State Circuits, vol. 39, no. 2, p. 275–282, 2004.

    Article  Google Scholar 

  25. R. Bagheri, A. Mirzaei, S. Chehrazi, E. Heidari, M. Lee, M. Mikhemar, W. Tang, and A. Abidi, “An 800-MHz6-GHz Software-Defined Wireless Receiver in 90-nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2860–2876, 2006.

    Article  Google Scholar 

  26. H. Darabi and A. A. Abidi, “Noise in RF-CMOS Mixers: A Simple Physical Model,” IEEE Journal of Solid-State Circuits, vol. 35, no. 1, pp. 15–25, 2000.

    Article  Google Scholar 

  27. E. Sacchi, I. Bietti, S. Erba, L. Tee, P. Vilmercati, and R. Castello, “A 15 mW, 70 kHz 1/f Corner Direct Conversion CMOS Receiver,” IEEE Custom Integrated Circuits Conference, pp. 459–462, 2003.

    Google Scholar 

  28. M. Valla, G. Montagna, R. Castello, R. Tonietto, and I. Bietti, “A 72-mW CMOS 802.11a Direct Conversion Front-End With 3.5-dB NF and 200-kHz 1/f Noise Corner,” IEEE Journal of Solid-State Circuits, vol. 40, no. 4, pp. 970–977, 2005.

    Google Scholar 

  29. J. A. Weldon, “A 1.75 GHz highly-integrated narrowband CMOS transmitter with harmonic-rejection mixers,” IEEE ISSCC 2001 Dig. Tech. Papers, pp. 160–161, 2001.

    Google Scholar 

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Correspondence to Rahim Bagheri .

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Bagheri, R., Mirzaei, A., Chehrazi, S., Abidi, A.A. (2011). Software-Defined Radio Receiver Architecture and RF-Analog Front-End Circuits. In: Okada, K., Kousai, S. (eds) Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-8514-9_4

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  • DOI: https://doi.org/10.1007/978-1-4419-8514-9_4

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