Abstract
This chapter presents new methods for restructuring logic networks based on fast Boolean techniques. The bases for these are (1) a cut-based view of a logic network, (2) exploiting the uniqueness and speed of disjoint-support decompositions, (3) a new heuristic for speeding up computations, (4) extension for more general decompositions, and (5) limiting local transformations to functions with 16 or less inputs, so that fast truth table manipulations can be used. The proposed Boolean methods lessen the structural bias of algebraic methods, while still allowing for high speed and multiple iterations. Experimental results on area reduction of K-LUT networks, compared to heavily optimized versions of the same networks, show an average additional reduction of 5.4% in LUT count while preserving delay.
This work is based on “Boolean factoring and decomposition of logic networks”, Robert Brayton, Alan Mishchenko, and Satrajit Chatterjee, in Proceedings of the 2008 IEEE/ACM international Conference on Computer-Aided Design, (2008) ACM, 2008.
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Brayton, R., Mishchenko, A., Chatterjee, S. (2011). Boolean Factoring and Decomposition of Logic Networks. In: Gulati, K. (eds) Advanced Techniques in Logic Synthesis, Optimizations and Applications. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7518-8_4
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