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Thin Wafer Manufacturing and Handling Using Low Cost Carriers

Chapter

Abstract

This chapter focuses on thin wafer fabrication and processing that uses low cost sub carriers. It describes the state of the art and the technical boundaries of the application of foils for wafer support and protection. First, the thinning technology and the applied materials are described in terms of process capability and maturity. Methods of thin wafer characterization are presented. Subsequently, the impact of front end design on ultra-thin wafer manufacturing is highlighted. Finally, processes after wafer thinning that enable the “perfect” die are described.

Keywords

Chip Thickness Wafer Thickness Chip Side Mechanical Robustness Wafer Edge 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgements

The findings and progress in the field of ultra-thin Silicon processing presented here are partially based on public funded innovation activities. The authors would like to thank the BMBF (Bundesministerium für Bildung und Forschung) for funding the projects SmartPack and SECUDIS.

References

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    Weibull distributions are plotted corresponding to: http://www.weibull.de/WeibullHTML.htm
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    Heinze PM, Amberger M and Chabert T (2007) Five-side stress relief: the method to get the “perfect die,” advanced packaging conference 10–11 October 2007, SEMICON Europa 2007, Stuttgart, GermanyGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.NXP Semiconductors Germany GmbHHamburgGermany

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