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3D-IC Technology Using Ultra-Thin Chips

  • Mitsumasa Koyanagi
Chapter

Abstract

Various generic methods for the three-dimensional (3D) integration of integrated circuits (ICs) are discussed. All these methods rely on ultra-thin chips. Wafer-to-wafer bonding, chip-to-wafer bonding, multichip-to-wafer bonding and reconfigured wafer-to-wafer bonding are described and compared. Several test chips fabricated by that use some of those concepts are briefly mentioned. Finally, specific concerns related to 3D-IC integration that use ultra-thin chips are indicated.

Keywords

Chemical Mechanical Polishing Wafer Bonding Test Chip Bonding Method Hydrophilic Area 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.New Industry Creation Hatchery Center (NICHe)Tohoku UniversitySendaiJapan

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