Peeling the Power Onion of Data Centers
As the concept of cloud computing is gaining popularity, more data centers are built to support the needs. The data centers, which have consumed 1.5% of the total electrical energy generated in the USA in 2006, are paying the majority of their maintenance cost to the electricity bills. Reducing power consumption in the data centers is now a must not only for seizing sustainable development but also for preserving our planet green. Along the effort of building power-efficient data centers, this chapter will start by answering the ultimate question—where did the power go? By taking a top–down approach from the data center level all the way down to the microarchitectural level, this chapter visualizes the power breakdowns and discusses the power optimization techniques for each layer.
KeywordsMigration Dioxide Expense Lost Serpentine
- 1.Seagate Cheetah 15K 3.5-inch Hard Drives. http://www.seagate.com/www/en-us/products/enterprise-hard-drives/cheetah-15k, 2010.
- 2.D. H. Albonesi. Selective Cache Ways: On-Demand Cache Resource Allocation. In International Symposium on Microarchitecture, pages 248–259, 1999.Google Scholar
- 3.American Power Conversion (APC) Corp. PDPM288G6H (300MM RACK, 266kW, Auto Transformer, 72 poles, Modular Distribution). http://www.apcmedia.com/salestools/MTAI-7P4S9D_R0_EN.pdf, 2009.
- 4.American Society of Heating, Refrigerating and Air-Conditioning Engineers, Inc. Datacom Equipment Power Trends and Cooling Applications. Chapter 3, Fig 3.10, 2005.Google Scholar
- 5.Anand Lal Shimpi. Intel’s Atom Architecture: The Journey Begins. http://www.anandtech.com/show/2493, 2008.
- 6.C. Auth, A. Cappellani, J. Chun, A. Dalis, A. Davis, T. Ghani, G. Glass, T. Glassman, M. Harper, M. Hattendorf, et al. 45nm High-k+ metal gate strain-enhanced transistors. In 2008 Symposium on VLSI Technology, pages 128–129, 2008.Google Scholar
- 7.L. Barroso and U. Holzle. The Case for Energy-proportional Computing. IEEE COMPUTER, 40(12):33, 2007.Google Scholar
- 8.P. Bohrer, E. Elnozahy, T. Keller, M. Kistler, C. Lefurgy, C. McDowell, and R. Rajamony. The Case for Power Management in Web Servers. Power Aware Computing, 62, 2002.Google Scholar
- 9.D. Bull, S. Das, K. Shivshankar, G. Dasika, K. Flautner, and D. Blaauw. A Power-efficient 32b ARM ISA Processor Using Timing-error Detection and Correction for Transient-error Tolerance and Adaptation to PVT Variation. In Digest of Tedhnical Papers in the International Solid-State Circuits Conference (ISSCC), pages 284–285, 2010.Google Scholar
- 10.D. DeVetter and D. Buchholz. Improving the Mobile Experience with Solid-State Drives. Intel Whitepaper, http://download.intel.com/it/pdf/Improving_the_Mobile_Experience_with_S% olid_State_Drives_2009.pdf.
- 11.F. Douglis, P. Krishnan, and B. Marsh. Thwarting the Power-hungry Disk. In Proceedings of the USENIX Winter 1994 Technical Conference on USENIX Winter 1994 Technical Conference, page 23. USENIX Association, 1994.Google Scholar
- 12.D. Economou, S. Rivoire, C. Kozyrakis, and P. Ranganathan. Full-system Power Analysis and Modeling for Server Environments. In Workshop on Modeling, Benchmarking, and Simulation (MoBS), 2006.Google Scholar
- 13.Ecos Consulting and EPRI Solutions. High Performance Buildings: Data Centers - Server Power Supplies. Lawrence Berkeley National Laboratory (http://hightech.lbl.gov/dctraining/reading-room.html), 2005.
- 14.D. Ernst, N. S. Kim, S. Das, S. Pant, R. Rao, T. Pham, C. Ziesler, D. Blaauw, T. Austin, K. Flautner, and T. Mudge. Razor: a Low-power Pipeline based on Circuit-level Timing Speculation. In Proceedings of the 36th Annual IEEE/ACM International Symposium on Microarchitecture, pages 7–18, 2003.Google Scholar
- 15.X. Fan, W.-D. Weber, and L. A. Barroso. Power provisioning for a warehouse-sized computer. In Proceedings of the 34th annual International Symposium on Computer Architecture, pages 13–23, New York, 2007.Google Scholar
- 16.K. Flautner, N. Kim, S. Martin, D. Blaauw, and T. Mudge. Drowsy caches: simple techniques for reducing leakage power. In Proceedings of the 29th Annual International Symposium on Computer Architecture, pages 148–157, 2002.Google Scholar
- 18.X.-Y. Hu, E. Eleftheriou, R. Haas, I. Iliadis, and R. Pletka. Write Amplification Analysis in Flash-based Solid State Drives. In Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference, SYSTOR ’09, pages 10:1–10:9, New York, 2009.Google Scholar
- 19.I. Hur and C. Lin. A Comprehensive Approach to DRAM Power Management. In Proceedings of the 14th International Symposium on High Performance Computer Architecture, pages 305–316. IEEE, 2008.Google Scholar
- 20.A. Karabuto. HDD Diet: Power Consumption and Heat Dissipation. http://ixbtlabs.com/articles2/storage/hddpower.html, 2005.
- 21.S. Kaxiras, Z. Hu, and M. Martonosi. Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power. In Proceedings of the 28 th annual International Symposium on Computer Architecture, volume 29, pages 240–251, 2001.Google Scholar
- 23.S. Li, J. Ahn, R. Strong, J. Brockman, D. Tullsen, and N. Jouppi. McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, pages 469–480, 2009.Google Scholar
- 24.D. Meisner, B. T. Gold, and T. F. Wenisch. PowerNap: Eliminating Server Idle Power. In Proceeding of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS ’09, pages 205–216, New York, 2009.Google Scholar
- 25.Micron. 512Mb DDR SDRAM (x4, x8, x16) Component Data Sheet. http://download.micron.com/pdf/datasheets/dram/ddr/512MBDDRx4x8x16.pdf, 2000.
- 26.S. Narendra and A. Chandrakasan. Leakage in nanometer CMOS technologies. Springer-Verlag New York Inc, 2006.Google Scholar
- 27.K. Natarajan, H. Hanson, S. Keckler, C. Moore, and D. Burger. Microprocessor Pipeline Energy Analysis. In Proceedings of the 2003 International Symposium on Low Power Electronics and Design, pages 282–287, 2003.Google Scholar
- 28.S. Pelley, D. Meisner, P. Zandevakili, T. F. Wenisch, and J. Underwood. Power routing: Dynamic power provisioning in the data center. In ASPLOS ’10: Proceedings of the fifteenth edition of ASPLOS on Architectural Support for Programming Languages and Operating Systems, pages 231–242, New York, 2010.Google Scholar
- 29.Rambus Inc. 128/144-MBit Direct RDRAM Data Sheet, May 1999.Google Scholar
- 30.N. Rasmussen. Increasing Data Center Efficiency by Using Improved High Density Power Distribution. White paper, American Power Conversion (APC) Corp, 128, 2008.Google Scholar
- 31.N. Rasmussen and J. Spitaels. A Quantitative Comparison of High Efficiency AC vs. DC Power Distribution for Data Centers. White paper, American Power Conversion (APC) Corp, 127, 2008.Google Scholar
- 32.RUMSEY Engineers, Inc. Data Center Energy Benchmarking Case Study — Facility 8. Lawrence Berkeley National Laboratory (http://hightech.lbl.gov/dctraining/reading-room.html), 2003.
- 33.Semiconductor Industries Association. Model for Assessment of CMOS Technologies and Roadmaps (MASTAR). http://www.itrs.net/models.html, 2007.
- 34.G. Shamshoian, M. Blazek, P. Naughton, R. S. Seese, E. Mills, and W. Tschudi. High-Tech Means High-Efficiency: The Business Case for Energy Management in High-Tech Industries. Lawrence Berkeley National Laboratory (http://hightech.lbl.gov/dctraining/reading-room.html), 2005.
- 35.N. Tolia, Z. Wang, M. Marwah, C. Bash, P. Ranganathan, and X. Zhu. Delivering Energy Proportionality with Non Energy-proportional Systems: Optimizing the Ensemble. In HotPower ’08 Workshop on Power Aware Computing and Systems. USENIX Association, 2008.Google Scholar
- 36.M. Ton, B. Fortenbery, and W. Tschudi. DC Power for Improved Data Center Efficiency. Lawrence Berkeley National Laboratory, EPRI Solutions, Ecos Consulting, Tech. Rep, 2008.Google Scholar