Soft Errors from Space to Ground: Historical Overview, Empirical Evidence, and Future Trends

  • Tino Heijmen
Part of the Frontiers in Electronic Testing book series (FRET, volume 41)


Soft errors induced by radiation, which started as a rather exotic failure mechanism causing anomalies in satellite equipment, have become one of the most challenging issues that impact the reliability of modern electronic systems, also in ground-level applications. Many efforts have been spent in the last decades to measure, model, and mitigate radiation effects, applying numerous techniques approaching the problem at various abstraction levels. This chapter presents a historical overview of the soft-error subject and treats several “disaster stories” from the past. Furthermore, scaling trends are discussed for the most sensitive circuit types.


Alpha Particle Combinational Logic Soft Error Critical Charge Clock State 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    JEDEC Standard JESD89A, “Measurement and reporting of alpha particle and terrestrial cosmic ray-induced soft errors in semiconductor devices”, Oct. 2006.Google Scholar
  2. 2.
    D. Binder, E.C. Smith, and A.B. Holman, “Satellite anomalies from galactic cosmic rays”, IEEE Trans. Nucl. Sci., vol. NS-22, no. 6, pp. 2675–2680, 1975.CrossRefGoogle Scholar
  3. 3.
    T.C. May and M.H. Woods, “A new physical mechanism for soft errors in dynamic memories”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 33–40, 1978.Google Scholar
  4. 4.
    J.F. Ziegler et al., “IBM experiments in soft fails in computer electronics (1978–1994)”, IBM J. Res. Dev., vol. 40, no. 1, pp. 3–18, 1996.CrossRefGoogle Scholar
  5. 5.
    J.F. Ziegler and W.A. Lanford, “Effect of cosmic rays on computer memories”, Science, vol. 206, pp. 776–788, 1979.CrossRefGoogle Scholar
  6. 6.
    J.F. Ziegler and W.A. Lanford, “The effect of sea level cosmic rays on electronic devices”, J. Appl. Phys., vol. 52, no. 6, pp. 4305–4311, 1981.CrossRefGoogle Scholar
  7. 7.
    T.J. O’Gorman, “The effect of cosmic rays on the soft error rate of a DRAM at ground level”, IEEE Trans. Electron Devices, vol. 41, no. 4, pp. 553–557, 1994.CrossRefGoogle Scholar
  8. 8.
    T.J. O’Gorman, J.M. Ross, A.H. Taber, J.F. Ziegler, H.P. Muhlfeld, C.J. Montrose, H.W. Curtis, and J.L. Walsh, “Field testing for cosmic ray soft errors in semiconductor memories”, IBM J. Res. Dev., vol. 40, no. 1, pp. 41–49, 1996.CrossRefGoogle Scholar
  9. 9.
    C. Lage, D. Burnett, T. McNelly, K. Baker, A. Bormann, D. Dreier, and V. Soorholtz, “Soft error rate and stored charge requirements in advanced high-density SRAMs”, in Proc. IEEE Int. Dev. Meet. (IEDM), pp. 821–824, 1993.Google Scholar
  10. 10.
    R.C. Baumann, R.C. Baumann, T.Z. Hossain, S. Murata, and H. Kitagawa, “Boron compounds as a dominant source of alpha particles in semiconductor devices”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 297–302, 1995.Google Scholar
  11. 11.
    R.C. Baumann, “Soft errors in advanced semiconductor devices – Part I: The three radiation sources”, IEEE Trans. Device Mater. Reliab., vol. 1, no. 1, pp. 17–22, 2001.CrossRefGoogle Scholar
  12. 12.
    R.C. Baumann and E.B. Smith, “Neutron-induced boron fission as a major source of soft errors in deep submicron SRAM devices”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 152–157, 2000.Google Scholar
  13. 13.
    Forbes Magazine: Daniel Lyons, “Sun Screen”, Nov. 13, 2000; Scholar
  14. 14.
    Cisco 12000 Single Event Upset Failures Overview and Work Around Summary, April 15, 2003;
  15. 15.
    N. Cohen, T.S. Sriram, N. Leland, D. Moyer, S. Butler, and R. Flatley, “Soft error considerations for deep-submicron CMOS circuit applications”, in Int’l Electron Devices Meeting (IEDM) Tech. Dig., pp. 315–318, 1999.Google Scholar
  16. 16.
    R. Baumann, “The impact of technology scaling on soft error rate performance and limits to the efficacy of error correction”, in Int’l Electron Devices Meeting (IEDM) Tech. Dig., pp. 329–332, 2002.Google Scholar
  17. 17.
    N. Seifert, P. Slankard, M. Kirsch, B. Narasimham, V. Zia, C. Brookreson, A. Vo, S. Mitra, B. Gill, and J. Maiz, “Radiation-induced soft error rates of advanced CMOS bulk devices”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 217–225, 2006.Google Scholar
  18. 18.
    P. Roche and G. Gasiot, “Impacts of front-end and middle-end process modifications on terrestrial soft error rate”, IEEE Trans. Device Mater. Reliab., vol. 5, no. 3, pp. 382–396, 2005.CrossRefGoogle Scholar
  19. 19.
    E.H. Cannon, M.S. Gordon, D.F. Heidel, A.J. KleinOsowski, P. Oldiges, K.P. Rodbell, and H.H.K. Tang, “Multi-bit upsets in 65 nm SOI SRAMs”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 195–201, 2008.Google Scholar
  20. 20.
    T. Heijmen and B. Kruseman, “Alpha-particle induced SER of embedded SRAMs affected by variations in process parameters and by the use of process options”, Solid State Electron., vol. 49, no. 11, pp. 1783–1790, 2005.CrossRefGoogle Scholar
  21. 21.
    T. Heijmen, “Spread in alpha-particle-induced soft-error rate of 90-nm embedded SRAMs”, in Proc. Int’l On-Line Testing Symp. (IOLTS), pp. 131–136, 2007.Google Scholar
  22. 22.
    K. Osada, K. Yamaguchi, Y. Saitoh, and T. Kawahara, “Cosmic-ray multi-error immunity for SRAM, based on analysis of the parasitic bipolar effect”, in Proc. VLSI Circuit Digest of Technical papers, pp. 255–258, 2003.Google Scholar
  23. 23.
    J.F. Ziegler, M.E. Nelson, J.D. Shell, R.J. Peterson, C.J. Gelderloos, H.P. Muhlfeld, and C.J. Montrose, “Cosmic ray soft error rates of 16-Mb DRAM memory chips”, IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 246–252, 1998.CrossRefGoogle Scholar
  24. 24.
    L. Borocki, G. Schindlbeck, and C. Slayman, “Comparison of accelerated DRAM soft error rates measured at component and system level”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 482–487, 2008.Google Scholar
  25. 25.
    T. Heijmen, P. Roche, G. Gasiot, K.R. Forbes, and D. Giot, “A comprehensive study on the soft-error rate of flip-flops from 90-nm production libraries”, IEEE Trans. Device Mater. Reliab., vol. 7, no. 1, pp. 84–96, 2007.CrossRefGoogle Scholar
  26. 26.
    R.C. Baumann, “Radiation-induced soft errors in advanced semiconductor technologies”, IEEE Trans. Device Mater. Reliab., vol. 5, no. 3, pp. 305–316, 2005.MathSciNetCrossRefGoogle Scholar
  27. 27.
    T. Heijmen and P. Ngan, “Radiation-induced soft errors in 90-nm and below”, presentation at 12th Annual Automotive Electronics Reliability Workshop, May 2007.Google Scholar
  28. 28.
    N. Seifert, B. Gill, V. Zia, M. Zhang, and V. Ambrose, “On the scalability of redundancy based SER mitigation schemes”, in Proc. Int’l Conf. IC Design Techn. (ICICDT), pp. 1–9, 2007.Google Scholar
  29. 29.
    S. Mitra, N. Seifert, M. Zhang, Q. Shi, and K.S. Kim, “Robust system design with built-in soft-error resilience”, IEEE Comput., vol. 38, no. 2, pp. 43–52, 2005.CrossRefGoogle Scholar
  30. 30.
    B. Gill, N. Seifert, and V. Zia, “Comparison of alpha-particle and neutron-induced combinational and sequential logic error rates at the 32 nm technology node”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 199–205, 2009.Google Scholar
  31. 31.
    P.E. Dodd, M.R. Shaneyfelt, J.R. Schwank, and G.L. Hash, “Neutron-induced latchup in SRAMs at ground level”, in Proc. Int’l Rel. Phys. Symp. (IRPS), pp. 51–55, 2003.Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.Regional Quality Center EuropeNXP SemiconductorsNijmegenThe Netherlands

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