Hybrid Circuit/Packet Switched Network for Energy Efficient on-Chip Interconnections

  • Mark A. Anders
  • Himanshu Kaul
  • Ram K. Krishnamurthy
  • Shekhar Y. Borkar
Chapter

Abstract

Network on-Chip (NoC) is an interconnect fabric to connect sub-system blocks on a chip. The NoC should provide high bandwidth and low latency, should consume low energy, and should be compact. However, all these requirements are at odds and require tradeoffs at all levels. In this chapter, we discuss issues and challenges for future NoCs with demands for high bandwidth and low energy. Next, we present details of how coupling packet-switched arbitration with circuit-switched data transfer can achieve these goals. In this hybrid network, packet-switched arbitration is used to reserve future circuit-switched channels for the data transfer, eliminating the performance bottlenecks associated with pure circuit-switched networks while maintaining their power advantage. Furthermore, proximity-based data streaming increases network throughput and improves energy efficiency. Measurements of this NoC in 45 nm CMOS are described to analyze de-sign tradeoffs.

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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Mark A. Anders
    • 1
  • Himanshu Kaul
  • Ram K. Krishnamurthy
  • Shekhar Y. Borkar
  1. 1.Intel CorporationHillsboroUSA

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