Application-Specific Multi-Threaded Dynamic Memory Management

  • Sotirios Xydis
  • Alexandros Bartzas
  • Iraklis Anagnostopoulos
  • Dimitrios Soudris


This chapter presents the methodology and the corresponding software framework developed to systematically explore the design space of Multi-Threaded Dynamic Memory Management (MTh-DMM). We developed two exploration approaches: (a) a two-phase constraint-orthogonal and (b) a single-phase aggressive exploration methodologies. Pareto optimal configurations are generated considering various design targets. Experimental results evaluate the solution quality delivered by the proposed exploration approaches and by state-of-the art general purpose dynamic memory management solutions, based on a real-life multi-threaded network application.


Design Space Memory Access Pareto Optimal Solution Memory Block Dynamic Memory 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    S. Agarwala et al. A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure. In Proc. of ISSCC, pages 262–601. IEEE Press, 2007.Google Scholar
  2. 2.
    D. Atienza et al. Systematic Dynamic Memory Management Design Methodology for Reduced Memory Footprint. ACM Trans. Des. Autom. Electron. Syst. (TODAES), 11(2):465–489, Apr. 2006.Google Scholar
  3. 3.
    A. Bartzas et al. Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. In Proc. of ASP-DAC, pages 434–439, 2008.Google Scholar
  4. 4.
    E. Berger et al. Hoard: A scalable memory allocator for multithreaded applications. SIGPLAN Not, 35(11), Nov. 2000.Google Scholar
  5. 5.
    Emery D. Berger, Benjamin G. Zorn, and Kathryn S. McKinley. Composing high-performance memory allocators. In In Proceedings of the 2001 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI, pages 114–124, 2001.Google Scholar
  6. 6.
    B. Bigler et al. Parallel dynamic storage allocation. In Proc. of ICPP, pages 272–275, 1985.Google Scholar
  7. 7.
    C. Schlatter Ellis and T. J. Olson. Algorithms for parallel memory allocation. International Journal of Parallel Programming, 17(4):303–345, 1988.CrossRefGoogle Scholar
  8. 8.
    D. Atienza, S. Mamagkakis, M. Leeman, F. Catthoor, J. M. Mendias, D. Soudris, and G. Deconinck. Fast system-level prototyping of power-aware dynamic memory managers for embedded systems. In Proc. of PACT, page, 2003.Google Scholar
  9. 9.
    D. Grunwald, and B. Zorn. CustoMalloc: efficient synthesized memory allocators. Softw. Pract. Exper., 23(8):851–869, 1993.CrossRefGoogle Scholar
  10. 10.
    D.Atienza, S.Mamagkakis, F.Catthoor, J.M. Mendias, and D.Soudris. Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. In Proc. of DATE, 2004.Google Scholar
  11. 11.
    F. Garcia, J. Fernandez. POSIX thread libraries. Linux Journal, page 36.Google Scholar
  12. 12.
    G. Bracha and W. Hook. Mixin-based inheritance. In Proc. of OOPSLA, pages 303–311, 1990.Google Scholar
  13. 13.
    A. Iyengar. Parallel dynamic storage allocation algorithms. In Proc. of PDP, 1993.Google Scholar
  14. 14.
    L. Benini, A. Macii, E. Macii, and M. Poncino. Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation. IEEE Design & Test of Computers, ():74–85, Apr. 2000.Google Scholar
  15. 15.
    M. R. Krishnan. Heap: Pleasures and pains. Microsoft Developer Newsletter, 1999.Google Scholar
  16. 16.
    P. E. McKenney and J. Slingwine. Efficient kernel memory allocation on shared memory multiprocessor. In Proc. of USENIX, pages 295–305, 1993.Google Scholar
  17. 17.
    P. Larson, M. Krishnan. Memory allocation for long-running server applications. In Proc. of the ISMM, 1998.Google Scholar
  18. 18.
    R. D. Blumofe and C. E. Leiserson. Scheduling multithreaded computations by work stealing. In Proc. of FOCS, pages 356–368, Nov. 1994.Google Scholar
  19. 19.
    K. Hirata and J. Goodacre. ARM MPCore; The streamlined and scalable ARM11 processor core. In Proc. of ASP-DAC, pages 747–748. IEEE Computer Society, 2007.Google Scholar
  20. 20.
    Solaris 9 Reference Manual man pages for mtmalloc.
  21. 21.
    T. Johnson. A concurrent fast-fits memory manager. Technical Report TR91-009, University of Florida, Department of CIS, (), 1991.Google Scholar
  22. 22.
    V. Pareto. Manuale di Economia Politica. Picola Biblioteca Scientifica, Milan, 1906, Translated into English by Ann Schweir (1971), Manual of Political Economy, MacMillan, London, 2008.Google Scholar
  23. 23.
    V. Vee and W. Hsu. A scalable and efficient storage allocator on shared memory multiprocessors. In Proc. of I-SPAN, pages 230–235, 1999.Google Scholar
  24. 24.
    W. Gloger. Dynamic memory allocator implementations in Linux system libraries., 2002.
  25. 25.
    P. R. Wilson et al. Dynamic storage allocation, a survey and critical review. In Proc. of IWMM, 1995.Google Scholar
  26. 26.
    Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, and Kiamal Pekmestzi. Custom mutli-threaded dynamic memory management for multiprocessor system-on-chip platforms. In ICSAMOS ’10: Proceedings of Embedded Computer Systems: Architectures, Modeling and Simulation, pages 102–109, jul. 2010.Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  • Sotirios Xydis
    • 1
  • Alexandros Bartzas
    • 1
  • Iraklis Anagnostopoulos
    • 1
  • Dimitrios Soudris
    • 1
  1. 1.National Technical University of AthensAthensGreece

Personalised recommendations