Analog Clustering Circuit

  • Jeremy Holleman
  • Fan Zhang
  • Brian Otis


This chapter describes the mapping of a clustering algorithm into analog circuits and the design of the constituent circuit blocks. The experimental characterization of the individual blocks and of the clustering system are described. The clustering algorithm implemented is based on the K-Means algorithm, but differs in that the magnitude of the updates is independent of the input.


Memory Cell Tunneling Junction Centroid Location Gate Current Distance Current 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    Ahuja B, Vu H, Laber C, Owen W (2005) A very high precision 500-na CMOS floating-gate analog voltage reference. IEEE J Solid-State Circuits 40(12):2364–2372CrossRefGoogle Scholar
  2. [2]
    Bridges S, Figueroa M, Hsu D, Diorio C (2005) A reconfigurable VLSI learning array. In: Proceedings of 31st European conference on solid-state circuits (ESSCIRC 2005). Grenoble, France, pp 117–120Google Scholar
  3. [3]
    Delbruck T (1991) Bump circuits for computing similarity and dissimilarity of analog voltages. In: Proceedings of international joint conference on neural networks, July 8–12, Seattle, Washington, pp 475–479Google Scholar
  4. [4]
    Figueroa M, Bridges S, Diorio C (2005) On-chip compensation of devicemismatch effects in analog VLSI neural networks. In: Saul L, Weiss Y, Bottou L (eds) Advances in neural information processing systems, vol 17. MIT Press, Cambridge, MA, pp 441–448Google Scholar
  5. [5]
    Gasparik F (1980) A precision autozeroing sample and hold integrated circuit. IEEE J Solid-State Circuits 15(6):945–949CrossRefGoogle Scholar
  6. [6]
    Hsu D, Figueroa M, Diorio C (2001) A silicon primitive for competitive learning. Adv Neural Inf Process Syst 13:713–719Google Scholar
  7. [7]
    Hsu D, Bridges S, Figueroa M, Diorio C (2003) Adaptive quantization and density estimation in silicon. Adv Neural Inf Process Syst 15:1107–1114Google Scholar
  8. [8]
    Lenzlinger M, Snow EH (1969) Fowler-nordheim tunneling into thermally grown SiO2. J Appl Phys 40(1):278–283CrossRefGoogle Scholar
  9. [9]
    Patel G, DeWeerth S (1995) Compact current-mode loser-take-all circuit. Electron Lett 31(24):2091–2092CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.Department of Electrical Engineering and Computer ScienceUniversity of TennesseeKnoxvilleUSA
  2. 2.Department of Electrical EngineeringUniversity of WashingtonSeattleUSA

Personalised recommendations