Direct SRAM Operation Margin Computation with Random Skews of Device Characteristics

Chapter
Part of the Integrated Circuits and Systems book series (ICIR)

Abstract

SRAM has been generally characterized with some SNM [12] from the voltage–voltage (VV) plots or the Icrit from the current–voltage (IV) plots. They do indicate the robustness of the SRAM operations but would not provide sufficient information for SRAM designers, as to the possible SRAM yield and the redundancy requirements. One way to estimate SRAM yield is based on the expected fail count with the Poisson distribution
$$ {\hbox{YIELD}} = \sum\limits_{n = 0}^k {\tfrac{{{\lambda^n}\exp ( - \lambda )}}{{n!}}} $$
(5.1)
where k is the maximum number of fails in the chip that can be repaired

Keywords

Migration Liner Pyramid Polysilicon 

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Copyright information

© Springer US 2010

Authors and Affiliations

  1. 1.IBM Microelectronics DivisionHopewell JunctionUSA

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