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Basic Sequences

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The Power of Assertions in SystemVerilog

Abstract

A sequence works in a way a collection never can.

George Murray

This chapter introduces the notion of sequence – a series of values in time. Sequences are used as building blocks for properties. This chapter describes basic sequence operators: concatenation, fusion, consecutive repetition, and disjunction. It is shown how to build properties from sequences directly, or using implications. Examples explaining typical usage of sequences are provided.

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Notes

  1. 1.

    Actually, there is more than one way to associate a property with a sequence, as explained in Chaps. 8 and 20.

  2. 2.

    Top-level sequential properties are very common in cover statements, see Chap. 18.

  3. 3.

    Also && is not the same as ##0 when match items are attached to the first sequence, see Chap. 16.

  4. 4.

    Of course, with the exception of the empty sequence, which has only the empty match.

  5. 5.

    As follows from the definition, all sequence matches should be non-empty.

References

  1. IEEE Standard Verilog Hardware Description Language (2001) IEEE Std 1364-2001, pp 1–856

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  2. Armoni R, Fix L, Flaisher A, Grumberg O, Piterman N, Tiemeyer A, Vardi MY (2003) Enhanced vacuity detection in linear temporal logic. In: CAV. pp 368–380

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Correspondence to Eduard Cerny .

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© 2010 Springer Science+Business Media, LLC

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Cerny, E., Dudani, S., Havlicek, J., Korchemny, D. (2010). Basic Sequences. In: The Power of Assertions in SystemVerilog. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-6600-1_5

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  • DOI: https://doi.org/10.1007/978-1-4419-6600-1_5

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  • Publisher Name: Springer, Boston, MA

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