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AC Coupled Wireless Power Delivery

  • Makoto TakamiyaEmail author
  • Kohei Onizuka
  • Takayasu Sakurai
Chapter
  • 763 Downloads
Part of the Integrated Circuits and Systems book series (ICIR, volume 0)

Abstract

The three-dimensional (3D) integration of stacked chips has recently gathered popularity as an approach for implementing a System-in-a-Package (SiP). Throughsilicon vias (TSVs) and bonding wires are the primary candidates for electrically connecting the stacked chips. Current commercially available 3D stacked chips use bonding wires due to their low cost. Bonding wires, however, are not a final solution for 3D stacked chips, because they limit signal bandwidth and hence the number of the stacked chips. TSVs represent an ideal technology for 3D stacked chips, because their signal bandwidth is high and the number of the stacked chips is theoretically unlimited. TSVs, however, have not been put to practical use in 3D stacked chips due to their high cost.

Keywords

Power Transmission Receive Power Bonding Wire Coupling Communication Wireless Power Transmission 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    H. Yoshikawa, A. Kawasaki, T. Iiduka, Y. Nishimura, K. Tanida, K. Akiyama, M. Sekiguchi, M. Matsuo, S. Fukuchi, K. Takahashi, “Chip scale camera module (CSCM) using through-silicon-via (TSV),” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2009, pp. 476–477.Google Scholar
  2. 2.
    N. Miura, D. Mizoguchi, T. Sakurai, T. Kuroda, “Analysis and design of inductive coupling and transceiver circuit for inductive inter-chip wireless superconnect,” IEEE Journal of Solid-State Circuits, vol. 40, no. 4, 2005, pp. 829–837.CrossRefGoogle Scholar
  3. 3.
    K. Kanda, D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, T. Sakurai, “1.27 Gbps/pin, 3 mW/pin wireless superconnect (WSC) interface scheme,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2003, pp. 186–187.Google Scholar
  4. 4.
    R.J. Drost, R.D. Hopkins, R. Ho, I. Sutherland, “Proximity communication,” IEEE Journal of Solid-State Circuits, vol. 39, no. 9, 2004, pp. 1529–1535.CrossRefGoogle Scholar
  5. 5.
    A. Fazzi, R. Canegallo, L. Ciccarelli, L. Magagni, F. Natali, E. Jung, P. Rolandi, R. Guerrieri, “3D capacitive interconnections with mono- and bi-directional capabilities,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2007, pp. 356–357.Google Scholar
  6. 6.
    K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, M. Saen, S. Komatsu, K. Osada, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, “An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2009, pp. 480–481.Google Scholar
  7. 7.
    Y. Sugimori, Y. Kohama, M. Saito, Y. Yoshida, N. Miura, H. Ishikuro, T. Sakurai and T. Kuroda, “A 2 Gb/s 15 pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2009, pp. 244–245.Google Scholar
  8. 8.
    K. Onizuka, H. Kawaguchi, M. Takamiya, T. Kuroda, T. Sakurai, “Chip-to-chip inductive wireless power transmission system for SiP applications,” Digest of Technical Papers, IEEE Custom Integrated Circuits Conference, 2006, pp. 575–578.Google Scholar
  9. 9.
    S. Masui, E. Ishii, T. Iwawaki, Y. Sugawara, K. Sawada, “A 13.56 MHz CMOS RF identification transponder integrated circuit with a dedicated CPU,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 1999, pp. 162–163.Google Scholar
  10. 10.
    G.A. Kendir, W. Liu, G. Wang, M. Sivaprakasam, R. Bashirullah, M.S. Humayun, J.D. Weiland, “An optimal design methodology for inductive power link with class-E amplifier,” IEEE Transactions on Circuits and Systems I, vol. 52, no. 5, 2005, pp. 857–866.CrossRefGoogle Scholar
  11. 11.
    T. Umeda, H. Yoshida, S. Sekine, Y. Fujita, T. Suzuki, S. Otaka, “A 950 MHz Rectifier Circuit for Sensor Networks with 10 m Distance,” Digest of Technical Papers, IEEE International Solid-State Circuits Conference, 2005, pp. 256–257.Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  • Makoto Takamiya
    • 1
    Email author
  • Kohei Onizuka
    • 2
  • Takayasu Sakurai
    • 3
  1. 1.VLSI Design and Education CenterUniversity of TokyoMeguro-kuJapan
  2. 2.Toshiba CorporationTokyoJapan
  3. 3.Institute of Industrial ScienceUniversity of TokyoMeguro-kuJapan

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