Low-Activity-Rate and Memory Circuits in STSCL

  • Armin Tajalli
  • Yusuf Leblebici


As already discussed in Chap. 3, reduced voltage swing, fast current domain switching speed, and fully differential topology of SCL circuits make them very suitable for high frequency applications. In addition, SCL circuits exhibit very low sensitivity to common-mode noise sources with very low noise injection to substrate or supply lines [1,2]


Supply Voltage Voltage Swing Static Random Access Memory CMOS Circuit Memory Circuit 
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© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  1. 1.Microelectronic Systems Lab. (LSM)Ecole Polytechnique Fédérale de Lausanne (EPFL)LausanneSwitzerland

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