A Focal Plane Processor for Continuous-Time 1-D Optical Correlation Applications
This chapter describes a 1-D Focal Plane Processor, which has been designed to run continuous-time optical correlation applications. The chip contains 200 sensory processing elements, which acquire light patterns through a 2mm ×10.9μm photodiode. The photogenerated current is scaled at the pixel level by five independent 3-bit programmable-gain current scaling blocks. The correlation patterns are defined as five sets of two hundred 3-bit numbers (from 0 to 7), which are provided to the chip through a standard I2C interface. Correlation outputs are provided in current form through 8-bit programmable gain amplifiers (PGA), whose configurations are also defined via I2C. The chip contains a mounting alignment help, which consists of three rows of 100 conventional active pixel sensors (APS) inserted at the top, middle and bottom part of the main photodiode array. The chip has been fabricated in a standard 0.35μm CMOS technology and its maximum power consumption is below 30mW. Experimental results demonstrate that the chip is able to process interference patterns moving at an equivalent frequency of 500kHz.
KeywordsOutput Channel Current Mirror PMOS Transistor Current Conveyor Correlation Output
The authors thank Dr. E. Roca from IMSE-CNM for her useful comments during pixel design. This work has been partially funded by CICE/JA, MICINN, and CDTI (Spain) through projects 2006-TIC-2352, TEC2009-11812, and Cenit EeE.
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