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An Introduction to Multi-Core System on Chip – Trends and Challenges

  • Lionel Torres
  • Pascal Benoit
  • Gilles Sassatelli
  • Michel Robert
  • Fabien Clermidy
  • Diego Puschini
Chapter

Abstract

The empirical law of Moore does not only describe the increasing density of transistors permitted by technological advances. It also imposes new requirements and challenges. Systems complexity increases at the same speed. Nowadays systems could never be designed using the same approaches applied 20 years ago. New architectures are and must be continuously conceived. It is clear now that Moore’s law for the last two decades has enabled three main revolutions. The first revolution in the mid-eighties was the way to embed more and more electronic devices in the same silicon die; it was the era of System On Chip. One main challenge was the way to interconnect all these devices efficiently. For this purpose, the Bus interconnect structure was used for long time. Anyway, in the mid-nineties the industrial and academic communities faced a new challenge when the number of processing cores became two numerous for sharing a single communication medieum. A new interconnection scheme based on the Network Telecom Fabrics, the Network On Chip was born; over the past decade intense research efforts have led to significant improvements.

Keywords

Processing Element Multiple Instruction Single Data Dynamic Power Consumption Multiprocessor Platform Synchronous Data Flow 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Lionel Torres
    • 1
  • Pascal Benoit
  • Gilles Sassatelli
  • Michel Robert
  • Fabien Clermidy
  • Diego Puschini
  1. 1.UMR CNRSUniversity of Montpellier 2MontpellierFrance

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