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Power-efficient Memory and Cache

  • Preeti Ranjan Panda
  • Aviral Shrivastava
  • B. V. N. Silpa
  • Krishnaiah Gummidipudi
Chapter

Abstract

The memory subsystem plays a dominant role in every type of modern electronic design, starting from general purpose microprocessors to customized application specific systems. Higher complexity in processors, SoCs, and applications executing on such platforms usually results from a combination of two factors: (1) larger amounts of data interacting in complex ways and (2) larger and more complex programs. Both factors have a bearing on an important class of components: memory. This is because both data and instructions need to be stored on the chip. Since every instruction results in instruction memory accesses to fetch it, and may optionally cause the data memory to be accessed, it is obvious that the memory unit must be carefully designed to accommodate and intelligently exploit the memory access patterns arising out of the very frequent accesses to instructions and data. Naturally, memory has a significant impact on most meaningful design metrics [31]:

Keywords

Memory Access Cache Size Cache Line Memory Hierarchy Memory Bank 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  • Preeti Ranjan Panda
    • 1
  • Aviral Shrivastava
    • 2
  • B. V. N. Silpa
    • 1
  • Krishnaiah Gummidipudi
    • 1
  1. 1.Department Computer Science and EngineeringIndian Institute of TechnologyNew DelhiIndia
  2. 2.Department of Computer Science and EngineeringArizona State UniversityTempeUSA

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