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Transaction-Accurate Architecture Design

  • Katalin Popovici
  • Frédéric Rousseau
  • Ahmed A. Jerraya
  • Marilyn Wolf
Chapter
Part of the Embedded Systems book series (EMSY)

Abstract

This chapter details the transaction-accurate architecture design. The transaction-accurate architecture design consists of integrating the OS and the communication software component with the application tasks code and adapting the software to specific communication synchronization protocol. The key contribution in this chapter represents the transaction-accurate architecture definition, organization, and design, using SystemC, for the token ring application running on the 1AX architecture, the Motion JPEG application targeting the Diopsis RDT architecture and the H.264 encoder running on the Diopsis R2DT architecture. The simulation of the transaction-accurate architecture model allows validating the execution of the application tasks code upon an OS and early performance validation of the communication mapping scheme. Different interconnect components, communication mapping schemes, and IP cores positioning over the interconnect component are explored in order to analyze the performances of the various communication paths.

Keywords

Design Space Exploration Communication Library Transaction Level Modeling Interrupt Service Routine Hardware Abstraction Layer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  • Katalin Popovici
    • 1
  • Frédéric Rousseau
    • 2
  • Ahmed A. Jerraya
    • 2
  • Marilyn Wolf
    • 3
  1. 1.MathWorks, Inc.NatickUSA
  2. 2.Laboratorie TIMAGrenobleFrance
  3. 3.Electrical & Computer Engineering Dept.Georgia Institute of TechnologyAtlantaUSA

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