Low-Power Processor Array Design Strategy for Solving Computationally Intensive 2D Topographic Problems

Chapter

Abstract

2D wave type topographic operators are distributed into six classes, based on their implementation methods on different low-power many-core architectures. The following architectures are considered: (1) pipe-line architecture, (2) coarse-grain cellular parallel architecture, (3) fine-grain fully parallel cellular architecture with discrete time processing, (4) fine-grain fully parallel cellular architecture with continuous time processing, and (5) DSP-memory architecture as a reference. Efficient implementation methods of the classes are shown on each architecture. The processor utilization efficiencies, as well as the execution times, and the major constrains are calculated. On the basis of the calculated parameters, an optimal architecture can be selected for a given algorithm.

Keywords

Retina Convolution Xenon Upscaling 

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Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  1. 1.Computer and Automation Research Institute of the Hungarian Academy of SciencesBudapestHungary
  2. 2.Eutecus Inc.BerkeleyCalifornia

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