Transaction-Level Platform Creation

  • Brian Bailey
  • Grant Martin
Part of the Embedded Systems book series (EMSY)


 Chapter 5 looked at the creation of a system-level virtual prototype that was used primarily for software and system-level functional verification. It addressed many of the issues associated with adding major architectural elements, such as processors, buses, and memories. Many of the issues associated with HW/SW partitioning were also dealt within  Chapter 6 and  7. These chapters took a top-down approach to the problem. They started from the highest level of functional description and refined the models by adding information associated with the major architectural decisions. In this chapter we will introduce a flow in which the hardware is modeled incrementally and integrated into a system that may then be used for hardware verification, more detailed architectural exploration, and software integration. These platforms are created at the behavioral transaction level and often referred to as transaction-level platforms (TLPs).


Functional Model Virtual Prototype Model Builder Callback Function Timing Policy 
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Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  1. 1.BeavertonUSA
  2. 2.Tensilica Inc.Santa ClaraUSA

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