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IP Meta-Models for SoC Assembly and HW/SW Interfaces

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ESL Models and their Application

Part of the book series: Embedded Systems ((EMSY))

Abstract

A functional model contains a lot of information, but it does not often contain the information about how it was meant to be used, what restrictions are placed on its usage or the way in which it is meant to be connected. This information is considered to be metadata about that block and was often the principal information that would have been found on a specification sheet for a device. Once that information is captured in a formalized manner it can be used by tools to help with things such as system construction, enable system consistency to be analyzed, or reduce the burden of things such as documentation.

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Notes

  1. 1.

    This is not the most optimal mapping of the register as the 8-bit counter value needs to be shifted every time it is read by the software. After finishing the chapter, consider what it would take to change this in a manual flow after it has been implemented in all the different views!

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Authors and Affiliations

  1. 9100 SW 161st Ave, Beaverton, OR, 97007, USA

    Brian Bailey

  2. Tensilica Inc., 3255-6 Scott Boulevard, Santa Clara, CA, 95054-3013, USA

    Grant Martin

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  1. Brian Bailey
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  2. Grant Martin
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Correspondence to Brian Bailey .

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Bailey, B., Martin, G. (2010). IP Meta-Models for SoC Assembly and HW/SW Interfaces. In: ESL Models and their Application. Embedded Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0965-7_2

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  • DOI: https://doi.org/10.1007/978-1-4419-0965-7_2

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  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-0964-0

  • Online ISBN: 978-1-4419-0965-7

  • eBook Packages: EngineeringEngineering (R0)

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