Process Variation Tolerant Single-supply True Voltage Level Shifter

Chapter

Abstract

A novel process variation tolerant single-supply true voltage level shifter (SS-TVLS) design is presented in this chapter. It is referred to as “true” since it can handle both low-to-high, or high-to-low voltage level conversions. The SS-TVLS is the first published VLS design, which can handle both low-to-high and high-to-low voltage translation without a need for a control signal. The use of a single supply voltage reduces circuit complexity, by eliminating the need for routing both supply voltages. The proposed circuit was extensively simulated in a 90 nm technology using SPICE. Simulation results demonstrate that the level shifter is able to perform voltage level shifting with low leakage for both low-to-high, as well as high-to-low voltage level translation. The proposed SS-TVLS is also more tolerant to process and temperature variations, compared with a combination of an inverter along with the nontrue VLS.

Keywords

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References

  1. 1.
    D. Lackey, David E. Lackey, Paul S. Zuchowski, Thomas R. Bednar, Douglas W. Stout, Scott W. Gould, and John M. Cohn, “Managing power and performance for SOC designs using voltage islands,” in Proc. of the Intl. Conf. on Computer-Aided Design, Nov. 2002, pp. 195–202.Google Scholar
  2. 2.
    T. Hattori et. al., “A power management scheme controlling 20 power domains for a single-chip mobile processor,” in Proc. of the Intl. Solid State Circuits Conf., Feb. 2006, pp. 540–541.Google Scholar
  3. 3.
    W. Kim, D. Shin, H. S. Yun, J. Kim, and S. L. Min, “Performance comparison of dynamic voltage scaling algorithms for hard real-time systems,” in Proc. of the Symposium on Real-Time and Embedded Technology and Applications, 2002, pp. 219–228.Google Scholar
  4. 4.
    B. Zhai, D. Blaauw, D. Sylvester, and K. Flautner, “Theoretical and practical limits of dynamic voltage scaling,” in Proc. of the Design Automation Conf., 2004, pp. 868–873.Google Scholar
  5. 5.
    C. Duan and S. P. Khatri, “Computing during supply voltage switching in DVS enabled real-time processors,” in Proc. of the Intl. Symposium on Circuits and Systems, May 2006, pp. 5115–5118.Google Scholar
  6. 6.
    R. Garg, Gagandeep Mallarapu, and S. P. Khatri, “A single-supply true voltage level shifter,” in Proc. of the Conf. on Design Automation and Test in Europe, March 2008, pp. 979–984.Google Scholar
  7. 7.
    S. C. Tan and X. W.Sun, “Low power CMOS level shifters by bootstrapping technique,” IEEE Electronics Letters, pp. 876– 878, Aug. 2002.Google Scholar
  8. 8.
    A. U. Diril, Y. S. Dhillon, A. Chatterjee, and A. D. Singh, “Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages,” IEEE Transaction on Very Large Scale Integration, vol. 13, pp. 1103–1107, Sept. 2005.Google Scholar
  9. 9.
    W. Wang, M. Ker, M. Chiang, and C. Chen, “Level shifters for high-speed 1-V to 3.3-V interfaces in a 0.13-pm Cu-interconnectiod/low-k CMOS technology,” in Proc. of the Intl. Symposium on VLSI Technology, Systems, and Applications, 18–20 April 2001, pp. 307–310.Google Scholar
  10. 10.
    D. Pan, H. W. Li, and B. M. Wilamowski, “A low voltage to high voltage level shifter circuit for MEMS application,” in Proc. of the Biennial University/Government/Industry Microelectronics Symposium, July 2003, pp. 128–131.Google Scholar
  11. 11.
    R. Puri, L. Stok, J. Cohn, D. S. Kung, D. Z. Pan, D. Sylvester, A. Srivastava, and S. Kulkarni, “Pushing ASIC performance in a power envelope,” in Proc. of the Design Automation Conf., June 2003, pp. 788– 793.Google Scholar
  12. 12.
    Q. A. Khan, S. K. Wadhwa, and K. Misri, “A single supply level shifter for multi voltage systems,” in Proc. of the Intl. Conf. on VLSI Design, Jan. 2006, pp. 1–4.Google Scholar
  13. 13.
    Nanoscale integration and modeling (NIMO) group (2007), ASU Predictive Technology Model [On-line], Available: http://www.eas.asu.edu/~ptm.
  14. 14.
    L. Nagel, “Spice: A computer program to simulate computer circuits,” in University of California, Berkeley UCB/ERL Memo M520, May 1995.Google Scholar

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© Springer-Verlag US 2010

Authors and Affiliations

  1. 1.HillsboroUSA
  2. 2.Department of Electrical and Computer EngineeringTexas A & M UniversityCollege StationUSA

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