Direct Memory Access (DMA)
In this chapter we discuss the Direct Memory Access (DMA) functionality of the Cell architecture. Sender and receiver initiated DMA plays a significant role in program optimization. We present the DMA engine, fence and barrier concept for ordering data transfers. The DMA engine can be used as an additional data movement processor using dma-list. Double-buffering and SPE-to-SPE DMA is discussed in the context of examples in the sequel of this text.
KeywordsDirect Memory Access Barrier Option Main Storage Cell Broadband Engine Transfer Size
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