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The Power Processing Element (PPE)

  • Sandeep Koranne
Chapter

Abstract

In this chapter we discuss the design, implementation and functionality of the PowerPC Processing Element (PPE), which serves as the control plane of the Cell Broadband Engine; the OS of the Cell runs on the PPE. The PPE contains a 64-bit, dual-thread PowerPC Architecture RISC core and supports a PowerPC virtualmemory subsystem. It has a 32 KB L1 I-cache, as well as a 32 KB D-cache, along with a 512 KB L2 unified cache. We analyze the PPE in detail, as not only does it provide significant facilities for controlling the SPEs, the PPE in Cell can run existing PowerPC 970MP and 970FX compiled applications. Since PowerPC is often used as a control processor in embedded systems, we use the PPE in Cell to understand PowerPC instruction set in detail. The PPE in Cell includes the vector/SIMD multimedia extensions (AltiVec).

Keywords

Data Cache Cache Line Direct Memory Access Instruction Cache Translation Lookaside Buffer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  1. 1.West LinnUSA

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