• Tapan Gupta

The word interconnect (interconnection) in very large-scale integrated circuits (VLSIs) means a metal line of low resistivity (high conductivity) which connects the various electronic devices to carry current or to transport charge [1]. The interconnectingmetal lines are separated from the substrate by insulating layers (dielectric material), except on the contact area. Since the creation of the integrated circuit (IC) in 1960, aluminum (Al) or its alloy (Al+Si+Cu) has become the primary material for interconnecting lines, and silicon dioxide (SiO2) has become the insulating layer (dielectric material) to separate the interconnects. Besides being an insulating material for interconnecting lines, SiO2 has been used also as a gate material in metal oxide semiconductor (MOS) devices. As a matter of fact, Al coupled with SiO2 has become the workhorse of IC technology.


Complementary Metal Oxide Semiconductor Gate Length Static Random Access Memory Node Technology Short Channel Effect 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    T.K. Gupta, Aluminum alloy as an interconnecting material in the fabrication of integrated circuits, Micron. Reliab., 19, 337 (1979); T.K. Gupta, Integrated Circuit, Chapter-1, p. 3, in Hand book of Thick and Thin film Film Hybrid Microelectronics, T.K. Gupta, Wiley, NJ (2003); K.N. Tu, Recent advances in electromigration in very large scale integration of interconnects, J. Appl. Phys., 84 (9), 5451 (Nov. 2003); J. Cong, L. He, C.K. Koh and P.H. Madden, Performance optimization of VLSI interconnects lay out integration, VLSI J., 21, 1 (1996); G. Ta, C. Ouvrad, H. Chauveau, and S. Nath, Experimental study of carrier transport in multi-layer structures, Microelectron. Relib., 47 (5), 610 (2007)Google Scholar
  2. 2.
    G.E. Moore, Lithography and future Moore’s law, Proc. VIIIth. Optical /Microlithography Conf. SPIE, Vol. 2440, pp. 2–17 (Feb. 1999); G.E. Moore, Cramming more components onto integrated circuits, Electronics, 38 (8), April 19 (1965); T. Kudo and N. Kimizuka, US Patent, 6853037 (2005); X. Ma, Nano Technol., 19, 275706 (May 2008)Google Scholar
  3. 3.
    2001 International Technology Road Map for Semiconductors (ITRS), H. Kamura et al., J. Solid State Circ., 39 (6), 919 (2006); C. Tsui, R. Yi-c Au, and R.Y.K Choi, Integration, VLSI J., 19, 275706 (May 2008)Google Scholar
  4. 4.
    G.C.F. Yeap, Leakage current in low standby power and high performance devices: Trends and challenges, ISPD 02, April 7–10, 2002, San Diego, CA; J. Baliga, Power devices, in S.M. Sze (ed.), Modern Semiconductor Devices,  Chapter 4, John Wiley, New York (1998); T.M. Pan, C.L. Chen, W.-W. Yeh and W.J. Lai, Electrochem. Solid State Lett., 10 (3), H101 (2007)
  5. 5.
    N. Yang, W.K. Hensen, and J.J. Wortman, A comparative study of gate tunneling and drain leakage currents in N-MOSFETs with sub-2 nm gate oxide, IEEE Trans. Electron. Dev., 47 (8), 1636–1644 (2000); R.S. Muller and T.I. Kamins, Device Electronics for Integrated Circuits, John Wiley, New York, Chapter 9 (1986); B. Mheen, Y.-J. Song, J.-Y. Kang, K. Hshim, and S. Hong, Mater. Sci. Semicond. Proc., 7 (4–6), 374 (2004)Google Scholar
  6. 6.
    T. Ghani et al., Scaling challenges and device design requirements for high performance sub 50 nm gate Planar C-MOS transistors, Tech. Digest of 2000 Symp. VLSI Tech. pp. 174–175 (2000); S.M. Sze (ed.), Modern Semiconductor Devices,  Chapter 3 and  5, John Wiley, New York (1998); N. Oda et al., Jpn. J. Appl. Phys., 46, 954 (2007)
  7. 7.
    C.-H. Choi et al., Impact of gate direct tunneling current on circuit performance: A simulation study, IEEE Trans. Electron. Dev., 48 (12), 2823–2829 (Dec. 2001); J. Sunea, I. Placencia, E. Farreas, N. Barniol, and X. Aymerich, Phys. Status Solidi (a), 109 (2), 479 (2006)Google Scholar
  8. 8.
    P.A. Pecan, Pushing the limits, Science, 285 (5436), 2079–2081 (1999); Z. Lu et al., IEEE Trans. VLSI, 15 (20), 159 (2007)Google Scholar
  9. 9.
    Table I, Semiconductor Industry Association, International Technology Road Map, 1999, Austin, TX: Int. SEMATECH (1999); K. Mistry et al., IEEE IEDM Dig., p. 247 (2007)Google Scholar
  10. 10.
    J.A. Devis et al., Interconnect limits on gigascale integration in the 21st century, Proc. IEEE, 80 (3) (2001); S. Thompson et al., Int. Tech. J., 6 (2), (May 16, 2002); G. Decher and J.B. Schlenoff (eds.), Multilayer Thin Films, Wiley-VCH, Weinheim, Germany (2002)Google Scholar
  11. 11.
    D. Silvester and C. Hu, Analytical modeling and characterization of deep-sub-micrometer interconnect, Proc. IEEE, 89 (5) (2001)Google Scholar
  12. 12.
    C.M. Osburn et al., Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go? IBM J. Res. Dev., 46 (2/3), 299 (March/May, 2002); F. Sacconi et al., IEEE Trans. Electron. Dev., 51 (5), 741 (2004)Google Scholar
  13. 13.
    T. Edwards and M. Steer, Foundations of Interconnect and Microstrip Design, John Wiley, New York (2000); J. Meindl, Theoretical, practical andlogical limits in ULSI, IEEE Int. Dev. Meeting, (IEDM ’83) pp. 8–13 (Dec. 1983); G. Moore, VLSI: Some fundamental challenges, IEEE Spect., 16, 30 (1979); R. Aghavani et al., Semiconductor Fabrication Techniques, 35th edition ICG Pub., UK, (2007)Google Scholar
  14. 14.
    A.K. Sinha, J.A. Cooper, and H.J. Levinstein, Speed limitations due to interconnect time constants in VLSI integrated circuits, Electron Dev. Lett., 3, 90 (1982); H.B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison Wesley, Reading, MA,  Chapter 4 and  5 (1993); J.W. Seight et al., Challenges and opportunities for high performance 32 nm NMOS Technology, IEEE IEDM Dig., p. 697 (Dec. 2006)
  15. 15.
    W. Zang et al., Surface and grain boundary scattering studied in beveled polycrystalline thin copper-film, J. Vac. Sci. Technol. B, 22(4), 1830 (2004)CrossRefGoogle Scholar
  16. 16.
    J. Huo et al., Characteristics of copper films produced by atomic layer deposition, J. Mat. Res., 17 (9), 2397 (2002); J. van Olmen et al., IEEE IITC Tech. Dig., p. 49 (2007)Google Scholar
  17. 17.
    G.L. Gan, C.V. Thompson, K.L. Pey, and W.K. Choi, Experimental characterization and modeling of reliability of three terminal dual damascene Cu-interconnect trees, J. Appl. Phys., 94 (2), 1222 (2003)CrossRefGoogle Scholar
  18. 18.
    S.P. Hau-Reige and C.V. Thompson, J. Appl. Phys., 88, 2382 (2000)CrossRefGoogle Scholar
  19. 19.
    R.H. Havemann and J.A. Hutchby, High performance interconnects: An integration overview, Proc. IEEE, 89, 586 (2001); X. W. Lin and D. Pramanik, Future interconnect technologies and copper metallization, Solid State Technol., 41 (10), 63 (1998)Google Scholar
  20. 20.
    R.A. Powel, A.S. Hurrus, and R. Hill, Raising the RC Speed Limit by the Use of Copper Interconnects, Novellus Systems Inc., San. Jose, CA (2000); T.N. Theis, The future of interconnect technology, IBM J. Res., 44 (3), 379 (2000)Google Scholar
  21. 21.
    International Technology Road Map for Semiconductors (ITRS), SEMATECH, Austin, TX (2002); A. Pratt, Overview of the Use of Cu-Interconnects in Semiconductor Industry, Advanced Energy Industries Inc., Fort Collins, CO (2004)Google Scholar
  22. 22.
    R. Liu, C. Pai, H. Cong, W. Lai, and E. Martinz, Impact of interconnect architecture on chip size and die yield, IEEE Int. Intercomm. Tech. Conf., p. 21 (1999)Google Scholar
  23. 23.
    W.R. Hunter, IEEE Trans. Electron. Dev., 44 (2), 304, (1997)CrossRefGoogle Scholar
  24. 24.
    T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ (2003)CrossRefGoogle Scholar
  25. 25.
    J. Cizek et al., Thermal stability of ultra-fine grained copper, Phys. Rev. B, 66 (9), 195331 (2002); A.A. Volincky and W.W. Gerberich, Nonindentation techniques for assessing mechanical reliability at nano-scale, Micron. Eng., 69, 519 (2003)Google Scholar
  26. 26.
    C.K. Hu, L. Gignac, S.G. Malhotra, R. Rosenberg, and S. Boettcher, Mechanism for very long electromigration lifetime in dual damascene Cu interconnects, Appl. Phys. Lett., 78 (7), 904 (2001); I.A. Blech and C. Herring, Appl. Phys. Lett., 29, 131 (1976)Google Scholar
  27. 27.
    S.P. Hau-Riege and C.V. Thompson, J. Appl. Phys., 89, 601 (2001); J.R. Lloyd, J. Appl. Phys., 69, 7601 (1991)Google Scholar
  28. 28.
    E.T. Ogawa, K.D. Lee, V.A. Blaschke, and P.S. Ho, Electromigration reliability issues in dual damascene Cu-interconnects, IEEE Trans. Reliab. 51 (4), 403 (Dec. 2002); L.J. Sham, Phys. Rev. B, 12, 3142 (1975)Google Scholar
  29. 29.
    R. Rosenberg, D. Edelstein, C.K. Hu, and K.P. Rodbell, Annu. Rev. Matter. Sci., 30, 229 (2000); W.L. Schaich, Phys. Rev. B, 13, 3350 (1976)Google Scholar
  30. 30.
    J.R. Black, Electromigration – a brief survey and some recent results, IEEE Trans. Electron. Dev., ED-16, 338 (1969)CrossRefGoogle Scholar
  31. 31.
    R. Streiter, H. Wolf, Z. Zhu, X. Xiao, and T. Gessener, Thermal and electrical simulation on deep submicron interconnecting system, Microelectron. Eng., 60, 39 (2002); J.A. Cunningham, improving Cu-interconnects, Semicond. Int. April 1 (2000)Google Scholar
  32. 32.
    S.P. Murarka and M.C. Peckerar, Electronic Materials, Science and Technology, Academic Press, San Diego, CA, p. 314 (1989); N. Ranganathan et al., J. Micromech. Microeng., 18, 075018 (2008)Google Scholar
  33. 33.
    M.J. Kobrinsky et al., On chip optical interconnect, Intel Technol. J., 8(2) 136, May (2004); Z. Lu et al., IEEE Trans. VLSI Syst., 15(2), 159 (2007)Google Scholar
  34. 34.
    E.S. Ege and Y.L. Shen, Thermomechanical response and stress analysis of copper interconnects, J. Electron. Mater., 32(6), 1000 (2001)Google Scholar
  35. 35.
    V. Weihnact and W. Bruckner, Acta Mater., 49, 2365 (2001)CrossRefGoogle Scholar
  36. 36.
    Y.L. Shen and U. Ramamurty, J. Appl. Phys., 93, 1806 (2003)CrossRefGoogle Scholar
  37. 37.
    P.M. Igic and P.A. Mawby, Micro. Electron. Relib., 40, 443 (2000)CrossRefGoogle Scholar
  38. 38.
    S. Ouimet, and M. Paquet, Overmold technology applied to cavity down ultra fine pitch PBGA packages, 48th Proc. ECTC, p. 458 (1998); T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ, Chapter 10(2003); A.G.K. Visanath et al., IEEE Trans. Adv. Packaging, 30(3), 448 (2007)Google Scholar
  39. 39.
    T. W. Ellis, L. Levine, and R. Wicen, Copper: Emerging material for wire assembly, Solid State Technol., 43 (4), 71 (April 2000); T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ,  Chapter 8 (2003)
  40. 40.
    A. Bischoff and F. Aldinger, Reliability criteria of new low cost materials for bonding wires and substrates, 34th Proc. ECTC, p. 441 (1984);US Patent, 7328830, (Dec. 2008)Google Scholar
  41. 41.
    E.S. Ege and Y.L. Shen, Thermomechanical response and stress analysis on Cu-interconnects, J. Electron. Mater., 32 (10), 1000 (2003)CrossRefGoogle Scholar
  42. 42.
    G.M. Phar, D.S. Harding, and W.C. Oliver, in M. Nastasi et al., (eds.) Mechanical Properties and Deformation Behavior of Materials Having Ultra-Thin Micro-Structures, Kluwer, Dordrecht, p. 449 (1943); P.S. Tsao et al., IEEE Proc. 54th Electron Comp. and Technol., 1 (1–4), 767 (2003)Google Scholar
  43. 43.
    H. Gao, L. Zang, W.D. Nix, C.V. Thompson, and E. Artz, Crack like grain boundary diffusion wedges in metal films, Acta Mater., 47, 2865 (1999); M.J. Buehler, A. Hartmaier, and G. Huajian, J. Mech. Phys. Solids, 51 (11012), 420 (2003)Google Scholar
  44. 44.
    M.J. Buehler, A. Hartmaier, and H. Gao, Atomic and continuum studies of crack like diffusion wedges and dislocations in submicron thin films, J. Mech. Phys. Solids, 51, 2105 (2003); Y. A. antipov and H. Gao, Proc. R. Soc. Lond. A, 458, 1673 (2002)Google Scholar
  45. 45.
    M.J. Buehler, A. Hartmaier, and H. Gao, Hierachial multiscale modeling of plasticity of submicron thin metal films, Model. Simul. Mater. Sci. Eng., 12, S391 (2004)CrossRefGoogle Scholar
  46. 46.
    M.R. Sorensen, Y. Mishin, and A.F. Voter, Phys. Rev. B., 62, 3658 (2000); J.C. Fisher, J. Appl. Phys., 22, 634 (1951); D. Zhang, J. Reng, and T. Liu, Mater. Sci. Eng., 425 (1–2), 78 (2006)Google Scholar
  47. 47.
    Y. Mishin, 50 years of grain boundary diffusion, Phil. Mag. A, 72, 1589 (1995); Z. Stemberg and M. Stupnisek, Eur. Phys. Lett. 71, 757 (2005)Google Scholar
  48. 48.
    Y.J. Park and Y.C. Joo, Electromigration induced stress interaction between vias and polygranular clusters, Scripta Matter. 44, 2497 (2001); P.S. Ho and J.K. Howard, Grain boundary solute electromigration in ploycrystalline films, J. Appl. Phys., 45 (8), 3249 (1974)Google Scholar
  49. 49.
    Y.C. Joo, C.V. Thompson, S.P. Baker, and E. Artz, J. Appl. Phys., 85(4) 2108 (1999); S.H. Rhee, Y. Du, and P.S. Ho, Thermal stress characteristics of Cu/oxide and Cu/Low-K sub-micron structures, J. Appl. Phys., 93 (7), 3926 (2003)Google Scholar
  50. 50.
    K.C. Saraswat and F. Mohammadi, Effect of interconnection scaling on time delay of VLSI circuits, IEEE Trans. Electron. Dev., ED-29, 645 (1982); K.P. Cheung, Microelectron. Relib. 41, 193 (2001)Google Scholar
  51. 51.
    S.J. Souri and K.C. Saraswat, Interconnect performance modeling for 3-D integrated circuits with multiple Si-layers, Int. Interconnect Tech. Conf. Proc., 24, (1999); J. Cong, L. He, C.K. Koh, and P.H. Madden, Performance optimization of VLSI interconnect layout, Integration, VLSI J., 21 (1&2), 1 (1996) D.-H. Kim et al., Science, 320 (5875), 507 (April 2008)Google Scholar
  52. 52.
    S.P. Murarka and R.J. Guttman, Advanced multilayer metallization schemes withCu as interconnection metal, Thin Solid Films, 236, 257 (1993); W.S. Young and S.H. Knickerbocker, Multilayer ceramics, in Interconnects for Electronics, R.C. Buchanan (ed.). Marcel Dekker, New York, pp. 489–526 (1986)Google Scholar
  53. 53.
    H.B. Bakoglu and J.D. Meindl, Optimal interconnection circuits for VLSI, IEEE Trans. Electron. Dev., ED-32, 903 (May 1985)CrossRefGoogle Scholar
  54. 54.
    G.W.A Dummer, Origin of Metallic Conductivity,  Chapter 1, p. 3, Hayden Book Co., New York (1970); X. Oudet, Metallic conductivity at low temperature, Annales de la fondation Louis de Broglie, 25 (3), 275 (2000)
  55. 55.
    W. Jones and N.H. March, Theoretical Solid State Physics, Dover, New York, Vol. 2, p. 691 (1973)Google Scholar
  56. 56.
    A. Christou, Electromigration and Electronic Device Degradation, John John Wiley, New York (1993)Google Scholar
  57. 57.
    F.M. D’Heurle, Electromigration and failure in electronics: An introduction, Proc. IEEE, 59 (10), 1409 (Oct. 1971); E.T. Ogawa, K.D. Lee, V.A. Blaschke, and P.S. Ho, Electromigration reliability issues in dual damascene Cu interconnects, IEEE Trans. Relib., 51 (4), 403 (2002)Google Scholar
  58. 58.
    D.K. Ferry, Interconnection lengths and VLSI, IEEE Circ. Dev., 1, 39–42, (July 1985); E.T. Ogawa et al., Direct observation of a critical length effect in dual damascene Cu/oxide interconnect, Appl. Phys. Lett., 78, 2652 (2001)Google Scholar
  59. 59.
    J.A. David and J.D. Meindl, Length scaling and material dependence of cross talk between distributed RC interconnects, Proc. Int. Interconnect Tech. Conf., pp. 227–229 (May 1999); K.C. Saraswat and F. Mohammadi, Effect of interconnection scaling on time delay of VLSI circuits, IEEE Trans. Electron. Dev., ED-29, 645 (1982)Google Scholar
  60. 60.
    W.S. Wong, and L.A. Glasser, Power distribution techniques for VLSI circuits, IEEE J. Solid State Circ., SC-21 (1), 150 (Feb. 1986)Google Scholar
  61. 61.
    H.B. Bakoglu, Circuits Interconnections and Packaging, Addison-Wesley, Reading, MA, p. 447 (1990)Google Scholar
  62. 62.
    S.J. Hillenius, MOSFETs and related devices, in Modern Semiconductor Device Physics, S.M. Sze (ed.). John Wiley, New York (1998); A. Sadaka et al., Fabrication and operation of sub-50 nm strained – Si directly on insulator,(SGOI) CMOSFETs, IEEE Int. SOI Conf. p. 209 (2004)Google Scholar
  63. 63.
    R.H. Yan, A. Ourmazd, and K.F. Lee, Scaling of MOSFET: From bulk to SOI to bulk, IEEE Trans. Electron. Dev.ED-39 (7), 965 (1992); C.M. Osburn et al., Vertically scaled MOSFET gate stacks and junctions, IBM J. Res. Dev. 46 (2/3), 299 (2002); K. Saraswat et al., IEEE IEDM Dig., p. 659 (2006)Google Scholar
  64. 64.
    R. People, Physics and applications of GeSi/Si heterostructures, IEEE J. Quantum Electron., 22, 1696 (1986); J. Jung, M.L. Lee, S. Yu, E.A. Fitzgerald, and D. Antoniadis, Implementation of both high hole and electron mobility in strained Si/strained Si, Ge on relaxed Si1–x Gex, IEEE Electron. Dev. Lett. 24, 460 (2003)Google Scholar
  65. 65.
    R.G. Grimmeiss and J. Olajos, Physics and applications of GeSi/Si hetrostructures, Phys. Scripta, T69, 52 (1997); M. Myronov et al., Appl. Phys. Lett., 91, 082108 (2007)Google Scholar
  66. 66.
    H. Temkin, J.C. Bean, A. Antreasyan, and R. Leibenguth, GexSi1–x strained layer hetro structure bipolar transistors, Appl. Phys. Lett. 52, 1089 (1988); S.J. Hillenius, MOSFETS and related devices,in S.M. Sze (ed.), Modern Semiconductor Device Physics, John Wiley, New York, p. 137 (1998); F.P. Gusev, V. Narayana, and M.M. Frank, IBM. J. Res. Dev., 90 (4/5), 387 (2006)Google Scholar
  67. 67.
    E. Levy, 15 years of advanced materials: Past and future, Adv. Mater. 15, 13 (2003); T. Ashley et al., Electron. Lett. 43 (14) (July 2007)Google Scholar
  68. 68.
    W.C.B. Peatman, H. Park, B. Gelmont, M.S. Shur, P. Maki, E.R. Brown, and M.J. Rooks, Novel metal/2-DEG junction transistors, in Proc. 1993 IEEE/ Cornell Conf. Cornell Univ. Press, Ithaca, New York, p. 314 (1993)Google Scholar
  69. 69.
    M. Mastrapasqua, C. King, P. Smith, and M. Pinto, Functional devices based on real space transfer inSi/SiGe structure, IEEE Trans. Electron. Dev. ED-43 (10), 1671 (1996); J. Wang et al., Symp. VLSI Tech. Dig., p. 46 (2007)Google Scholar
  70. 70.
    N.D. Zakarov, V.G. Talalaev, P. Werner, A.A. Torkikh, and G.E. Cirlin, Room temperature light emission from a highly strained Si/Ge superlattice, Appl. Phys. Lett. 83 (15), 3084 (2003)CrossRefGoogle Scholar
  71. 71.
    V.G. Talalaev, G.E. Cirlin, A.A. Torkikh, N.D. Zakharov, and P. Warner, Room temperature electroluminescence from Ge/Si quantum dots,Phys. Stat. Solidi, 198 (1) R4 (2003)CrossRefGoogle Scholar
  72. 72.
    M.J. Kobrinski et al., On chip optical interconnects, Intel Tech. J. 8 (2), 129 (May 2004)Google Scholar
  73. 73.
    J.F. Shackelford, Introduction to Materials Science for Engineers, Macmillan, New York (1988); J. Wang et al., Symp. VLSI Tech. Dig., p. 40 (2007)Google Scholar
  74. 74.
    J.W. Mayer and S.S. Lau, Electronic Materials Science, Macmillan, New York (1990); A. Wei et al., Symp. VLSI Tech. Dig., p. 216 (2007)Google Scholar
  75. 75.
    A.B. Glaser and G.E. Subak-Sharpe, Integrated Circuit Engineering, Design, Fabrication and Applications,Addison Wesley, Reading, MA (1977); H. Kim et al., Electrochem. Solid State Lett., 11(5) 127 (2008)Google Scholar
  76. 76.
    P.R. Gray and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley, New York (1993); C.E. Royer et al., Solid State Electron., 52(9), 1285 (2008)Google Scholar
  77. 77.
    M.P. Anderson and S. Ling, Computer simulation of transport in thin films, J. Electronic Mater. 19 (11) p. 1161 (1990); T, Turner, Cu-line width resistivity measurements, Solid State Technol., 43, 89 (April 2000); D. Ingerly et al., IEEE IITC, June-4, San Francisco, CA (2008)Google Scholar
  78. 78.
    N.L. Michael, C. Kim, P. Gillepie, and R. Augur, Electromigration failure in ultra-fine Cu-interconnects, J. Electron. Matter. 32 (10) pp. 988–993 (2003); A. Zehe, A selection rule of solutes for void resistance crystalline metallic alloys exposed to electromigration, Cryst. Res. Technol., 37 (8), 817 (2002); and K.N. Tu, Recent advances on electromigration in very large scale integration interconnects, J. Appl. Phys., 94 (9), 5452 (2003); N. Oda, Jap. J. Appl. Phys., 46, 954 (2007)Google Scholar
  79. 79.
    G.W.A. Dummer, Materials for Conductive and Resistive Functions, Hayden Book Co., New York (1970); D. Raabe, Computational Materials Science, Wiley-VCH, Weinheim, Germany (1998); A. Sakata et al., IEEE IITC Proc. (2006)Google Scholar
  80. 80.
    N.B. Hanny and U. Colombo (eds), Electronic Materials, Plenum Press, New York (1972); D. Wood, Material Development and Processing, John Wiley, Hoboken, NJ (2000)Google Scholar
  81. 81.
    C.A. Harper (ed.), Handbook of Materials and Processes for Electronics, McGraw Hill, New York (1970); P.C. Dunn, Gateway into Electronics, John Wiley,Hoboken, NJ (2000)Google Scholar
  82. 82.
    B. Tareev, Physics of Dielectric Materials, MIR Publishers, Moscow (1973); G.D. Wilk, R.M. Wallace, and J.M. Anthony, J. Appl. Phys., 89, 5243 (2001); and K. Mistry et al., IEEE IEDM Tech. Dig., p. 247 (2007)Google Scholar
  83. 83.
    J.B. Birks, Modern Dielectric Materials, Heywood, London (1960); R.L. Opila and D.W. Hess, A century of dielectric science and materials, J. Electrochem. Soc. 150 (1), S1 (2003); M. Chudzik et al., VLSI Tech. Dig., p. 194 (2007)Google Scholar
  84. 84.
    A. Charlesby, Atomic Radiation and Polymers, Pergamon Press, Oxford (1960); A.D. Schluter, Synthesis of Polymers, Wiley-VCH, Weinheim, Germany, (1998); S. Narashimha et al., IEEE IEDM Tech. Dig., pp. 1–4 (2006)Google Scholar
  85. 85.
    J.K. Stille, Introduction to Polymer Chemistry, John Wiley, New York (1962); H.G. Elias, Introduction to Polymer Science, Wiley-VCH, Weinheim, Germany (1997); G. Gambino et al., IEEE IEDM Tech. Dig., p. 131 (2007)Google Scholar
  86. 86.
    F.W. Billmeyer, Textbook of Polymer Chemistry, 2nd edn. Interscience. New York (1950); L.H. Sperling, Polymeric Multcomponent Materials, Wiley-VCH, Weinheim, Germany (1997)Google Scholar
  87. 87.
    H.F. Wolf, Semiconductors, John Wiley, New York (1971); D.A. Miller, IEEE IITC June 2008, San Francisco, CAGoogle Scholar
  88. 88.
    D.K. Ferry, Semiconductors, Macmillan, New York (1991); P. Zimmerman et al., IEEE IEDM Tech Dig., p. 437, (2006)Google Scholar
  89. 89.
    W. Crawford, An Introduction to Semiconductors, John Wiley, New York (1957); D. Sing et al., Mater. Today, 9 (6), 26 (2006)Google Scholar
  90. 90.
    P.S. Kireev, Semiconductor Physics, Mir Publishers, Moscow (1975)Google Scholar
  91. 91.
    W.C. Dunlap, Jr., An Introduction to Semiconductors, John Wiley, New York (1957); A. Khakifirooz and D.A. Antoniadis, IEEE IEDM Tech Dig. 84 (9–10), p. 2047 (Sept 2008)Google Scholar
  92. 92.
    H.F. Wolf, Semiconductors, John Wiley, New York, p. 201 (1977)Google Scholar
  93. 93.
    J.D. McBrayer, R.W. Swanson, and T.W. Sigmon, J. Electrochem. Soc. 133, 1242 (1986)CrossRefGoogle Scholar
  94. 94.
    S.P. Murarka, Tungsten and Other Advanced Metals for VLSI Applications, MRS Publishers, Pittsburgh (1991)Google Scholar
  95. 95.
    J. Li, T.E. Sedal, and J.W. Mayer, MRS Bull., XIX (8), 15 (1994)Google Scholar
  96. 96.
    M. Bohr, IEEE Int. Electron. Dev. Meet., 95, 241 (1995)CrossRefGoogle Scholar
  97. 97.
    D. Edelstein et al., IEEE Int. Electron Dev. Meet., p. 97 (1997) and T. Murata et al., Jpn. J. Appl. Phys., 47, 2488 (2008)Google Scholar
  98. 98.
    L.L. Bran, R.S. Phillips, and N.H. Dickey, Funk and Wagnall’s New Encyclopedia, Vol. 7, p. 200, MCMLXXI, (1989)Google Scholar
  99. 99.
    I. Bremmev, Copper the smart choice, The International Copper Association, New York (2001); T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ, p. 143 (1983)Google Scholar
  100. 100.
    F.A. Cotton and G. Willkinson, Basic Inorganic Chemistry, Junior and Advanced, John Wiley (1976); U. Schubert and N. Husing, Synthesis of Inorganic Materials, Wiley-VCH, Weinheim, Germany (2000)Google Scholar
  101. 101.
    W.E. Hatfield and R. Whyman, Coordination chemistry of copper, Transit. Metal Chem., 5, 47 (1969); G. Meyer, D. Naumann, and L. Wesemann, Inorganic Chemistry Highlights, Wiley-VCH, Weinheim, Germany (2002)Google Scholar
  102. 102.
    I. Hadar, Experimental investigation of wire diameter effect on the fine pitch ball bonding, Proc. SEMICON Test, Assembly and Packaging (April, 1996); T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ, p. 258 (1983)Google Scholar
  103. 103.
    V. Shanon and D. Smith, Copper interconnects for high volume manufacturing, Semicond. Intl., p. 93 (May 2001)Google Scholar
  104. 104.
    D. Simonaitis, IC Failure rate estimates from field data, MIL-HDBK-217D, 15, 5 (1982); A.A. Shirzadi and E.R. Wallach, Sci. Technol. Welding Joining, 9 (1), 37 (2004)Google Scholar
  105. 105.
    L. Vanasupa, Y.C. Joo, and P.R. Besser, J. Appl. Phys., 85 (5) (1999); A. Sekiguchi, J. Koike, and K. Maruyama, Appl. Phys. Lett., 83 (10), 1962 (2003)Google Scholar
  106. 106.
    A.N. Campbell, R.E. Mikawa, and D.B. Knorr, J. Electron. Mater. 22, 589 (1993)CrossRefGoogle Scholar
  107. 107.
    K.A. Fichthorn, and M. Scheffler, Phys. Rev. Lett., 84, 5371 (2000)CrossRefGoogle Scholar
  108. 108.
    P. Hyldgaard and M. Bersson, J. Appl. Phys. Cond. Mater. 12, L-13 (2000)CrossRefGoogle Scholar
  109. 109.
    J. Repp, M. Moresco, C. Meyer, and K.H. Rieder, Phys. Rev. Lett., 85, 2981 (2000)CrossRefGoogle Scholar
  110. 110.
    C.S. Hau-Reige and C.V. Thompson, Appl. Phys. Lett., 78 (22), 3451 (2001)CrossRefGoogle Scholar
  111. 111.
    B.D. Knowlton, J.J. Clement, and C.V. Thompson, J. Appl. Phys. 81 (9), 6073 (1997)CrossRefGoogle Scholar
  112. 112.
    D. Gan, P.S. Ho, R. Huang, J. Leu, J. Maity, and T. Scherban, J. Appl. Phys., 97, 103531 (2005)CrossRefGoogle Scholar
  113. 113.
    B.H. Mahan, University Chemistry, Addison Wesley, Reading, MA (1975)Google Scholar
  114. 114.
    F.A. Cotton and G. Wilkinson, Advanced Inorganic Chemistry, John Wiley, New York, Chapter 20, p. 555 (1972)Google Scholar
  115. 115.
    L. Maissel, Thin film resistors, in L. Maissel and R. Glang (eds.), Handbook of Thin Film Technology, McGraw Hill, New York, Chapter 18 p-18-3 (1983)Google Scholar
  116. 116.
    M.P. Lepselter, Bell Syst. J. 45, 233 (1966)CrossRefGoogle Scholar
  117. 117.
    I. Blech, H. Sello, and L.V. Gregor, Thin films in integrated circuits, in L. Maissel and R. Glang (eds.), Handbook of Thin Film Technology, McGraw Hill, New York, p. 23–27 (1983)Google Scholar
  118. 118.
    G. Timp, Nanotechnology, Springer-Verlag, Berlin (1999)CrossRefGoogle Scholar
  119. 119.
    F.A. Cotton and G. Wilkinson, Basic Inorganic Chemistry, John Wiley, New York, p. 50 (1976)Google Scholar
  120. 120.
    H.O. Pritchard and H.A. Skinner, Electronegativity scales, Chem. Rev. 55, 745 (1955)CrossRefGoogle Scholar
  121. 121.
    J.M. Mayer, and S.S. Lau, Electronic Materials Science for Integrated Circuits in Si and GaAs, Macmillan, New York, p. 411 (1990)Google Scholar
  122. 122.
    H.B. Bakoglu (author), Multilayer interconnections, in Circuits Interconnections and Packaging for VLSI, Addison Wesley, Reading, MA p. 211 (1990); and C.C. Chu et al., Micrelectron Relib., 47 (9), 1560 (2007)Google Scholar
  123. 123.
    K. Otsuka (ed.), Multilayer Ceramic Substrate Technology for VLSI Package/ MCM, Elsevier, New York (1993); and N. Oda et al. Jpn. J. Appl. Phys., 46, 954 (2007)Google Scholar
  124. 124.
    N. Nang, W.K. Henson, J.R. Hauser, and J.J. Wortman, Modeling study of ultrathin gate oxides using direct tunneling current and capacitance, IEEE Trans. Electron. Dev., 46, 1464 (1999)CrossRefGoogle Scholar
  125. 125.
    H. Yu, Y.T. Hou, M.F. Li, and D.L. Kong, Investigation of hole tunneling current through ultrathin oxynitride/oxide stack dielectrics in PMOSFETS, Trans. Electron. Devices, 49 (7), 1158 (2002)CrossRefGoogle Scholar
  126. 126.
    T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ (2003)CrossRefGoogle Scholar
  127. 127.
    J.E. Sergent, The hybrid microelectronics and MCM technology, in C.A. Harper (ed.), Electronics Packaging and Interconnections Handbook, 3rd edn., McGraw Hill, New York (2000)Google Scholar
  128. 128.
    Y. Shimada, K. Utsumi, M. Suzuki, H. Takamizawa, N. Mitsura, and Y. Scihen, Low firing temperature multilayer glass ceramic substrate, IEEE Trans. On Comp. Hybd. And Manuf., 6 (4), 382 (1983).Google Scholar
  129. 129.
    H. Comb, Jr. (ed.), Printed Circuit Handbook, 2nd edn., McGraw Hill, New York (1988)Google Scholar
  130. 130.
    S.P. Murarka, I.V. Verner, and R.J. Guttman, Copper: Fundamental Mechanisms for Microelectronics Applications, John Wiley, New York (2000)Google Scholar
  131. 131.
    R. Glang and L.V. Gregor, Generation of patterns in thin films, in L.I. Maissel and R. Glang (eds.), Handbook of Thin Film Technology, McGraw Hill, New York (1983); S.V. Sreenivasan et al., 23rd Int. VLSI/ULSI multilevel Interconn. Conf. Sept 26 (2006)Google Scholar
  132. 132.
    L.F. Thompson, C.G. Wilson, and J.M. J. Frecht, Materials for Microlithography, American Chemical Society Publications, Washington, DC (1984); and T. Schram et al., VLSI Tech Symp. (2008)Google Scholar
  133. 133.
    C.C. Ku et al., Electrical Properties of Polymers, Hanser, New York (1987)Google Scholar
  134. 134.
    T. Swager, Light from insulated organic wires, Nature Mater., 1 (3), p. 151 (Nov. 2002)CrossRefGoogle Scholar
  135. 135.
    F. Cacialli et al., Cyclodextrin-threaded conjugated polyrotaxes as insulated molecular wires with reduced interstrand interactions, Nature Mater., 1 (3), p. 161 (Nov. 2002)CrossRefGoogle Scholar
  136. 136.
    M. Good, J.C. Kotz, J.L. Wood, M.D. Joesten, and J.W. Moore, The Technical World, Saunders College Publications, New York, p. 579 (1994); H.L. Tsai, J.L. Schindler, C. R. Kannewurf, and M.G. Kanatzidis, Plastic superconducting polymer, Chem. Mater. 9, 875 (1997)Google Scholar
  137. 137.
    H.A. Klok and S. Lecomanndoux, Supramolecular materials via block copolymer assembly, Adv. Mater. 13 (6), 1217 (2001); F. Cacialli et al., Cyclodextrin – threaded conjugated polyrotaxes an insulator molecular wires with reduced interstrand interactions, Nature Mater., 1 (3), 161 (Nov. 2002); and H.J. Schneider and A. Yatsimirski, Principles and Methods in Supramolecular Chemistry, John Wiley, Chichester (2000)Google Scholar
  138. 138.
    J.G. Frazier, An Ideology for Nanoelectronics in Computation, Plenum Press, New York (1988)Google Scholar
  139. 139.
    T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics, John Wiley, Hoboken, NJ, p. 116 (2003)Google Scholar
  140. 140.
    D.R.T. Zahn, T. Kampen, and R. Scholz, Organic Molecular Semiconductors, John Wiley, Chichester, (2004)Google Scholar
  141. 141.
    S. Zing and J. Shi, Novel polymers for light emitting diodes, in H.S. Nalwa and L.S. Rohwer (eds), Handbook of Luminescence, Display Materials and Devices, American Scientific Publishers, CA (2003); Y.G. Seol et al., Thin Solid Films, 515 (12), 5065 (2007)Google Scholar
  142. 142.
    C.D. Dimitrakopoulos and P.R.L. Malenfant, Organic thin film transistors for large area electronics, Adv. Mater., 14, p. 401 (2002); S.J. Hillenius, MOSFETs and related devices, in S.M. Sze (ed.), Modern Semiconductor Device Physics, John Wiley, New York,Chapter 3, pp. 165–168 (1998)Google Scholar
  143. 143.
    T. Mcnelly et al., High performance 0.25 μm SRAM technology with tungsten interpoly plug, in IEDM Tech. Dig., 927 (1995); and Y.G. Seol, J.G. Lee, and N-E Lee, Organic electron., 8 (5), 513 (Oct 2007)Google Scholar
  144. 144.
    J.E. Katon (ed.), Organic Semiconducting Polymers, Marcel Dekker, New York (1968)Google Scholar
  145. 145.
    D. Jerome and K. Bechgaard, Nature, 410, March 8, p. 162–163, (2001); P. Singer, Emerging technologies, Technical News, Semicond. Int. 14 (4), April, p. 36, (2001)Google Scholar
  146. 146.
    H.F. Wolf, Semiconductors, John Wiley New York, p. 12 (1971)Google Scholar
  147. 147.
    H. Herbs, Semiconducting Materials, H.K. Henisch (ed.), Butterworths Scientific, London, Chapter 22(1952)Google Scholar
  148. 148.
    W. Crawford Dunlap, Jr., An Introduction to Semiconductors, John Wiley, New York, Chapter 11, p. 224 (1957)Google Scholar
  149. 149.
    W. Zuhlehner and D. Huber, Czochralski Growth Silicon, Springer-Verlag, Berlin, Germany (1982)Google Scholar
  150. 150.
    R.C. Jaeger, Introduction to Microelectronics Fabrication, Addison Wesley, Reading, MA (1988)Google Scholar
  151. 151.
    A.J. Khambata, Introduction to Large Scale Integration, John Wiley, New York (1969)Google Scholar
  152. 152.
    H.J. Queisser and E. E. Haller, Defects in semiconductors: Some fatal, some vital, Science, 281, 945 (Aug, 1998)CrossRefGoogle Scholar
  153. 153.
    R.B. Fair, Concentration of diffused dopants in silicon, in F.F.Y. Wang (ed.), Impurity Doping Processes in Silicon, North Holland, New York (1981)Google Scholar
  154. 154.
    E.E. Haller and F.S. Goulding, in C. Hilsum (ed.), Handbook on Semiconductors, 2nd edn, Vol. 4, pp. 937–963, Elsevier, New York, Chapter 11 (1993)Google Scholar
  155. 155.
    P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM, J. Res. Dev., 42 (5), p. 567 (Sept. 1998); Z. Lu et al., IEEE Trans. VLSI Symp. 15 (2) 159 (2007)Google Scholar
  156. 156.
    P. Moon et al., Process road map and challenges for metal barriers, Proc. IEDM (2003); Nd X. Zhang, P.S. Ho, and T. Nakamura, IEEE IITC Conf. June 2008, San Francisco, CAGoogle Scholar
  157. 157.
    International Device Meeting (IEDM), Dec. 11–14, San Francisco Hilton Tower (2000)Google Scholar
  158. 158.
    VLSI Multilevel Interconnecting Conf. (VMIC), Santa Clara, June 26–30 (1995)Google Scholar
  159. 159.
    S. Thompson et al., 130 nm logic technology featuring 60 nm transistors, low-K dielectrics, and Cu-interconnects, Intel Tech. J. 6 (2), p. 5 (May16, 2002)Google Scholar
  160. 160.
    K.L. Lai, Ionized hollow cathode magnetron sputtering, in J.P. Hopwood (ed.), Ionized Physical Vapor Deposition, Academic Press, San Diego, CA, p. 115 (2000)Google Scholar
  161. 161.
    Microstructure Science; Engineering and Technology, National Academy of Science, Washington DC (1979)Google Scholar
  162. 162.
    Y.K. Cho et al., A spacer patterning technology for nano-scale CMOS, IEEE Trans. Electron. Dev. Lett., 49, 436 (2002)CrossRefGoogle Scholar
  163. 163.
    B. Doyle et al. Transistor elements for 30 nm physical gate lengths and beyond, Intel Tech. J. 6 (2), 43 (May 16, 2002)Google Scholar
  164. 164.
    T. Clarysse, D. Vanhaeren, and W. Vandervorst, Impact probe penetration on electrical characterization of sub-50 nm profiles, J. Vac. Sci. Technol., B20 (1), 459 (2002); V.N. Faifer, M.I. Current, T.M. H. Wong, and V.V. Souchkov, Non contact sheet resistance and leakage current mapping for ultra shallow junctions, Proc, 8th Intl., Workshop on Fabrication, Characterization, and modeling of ultra shallow junctions in semiconductors, June 5–8 (2005)Google Scholar
  165. 165.
    T.K. Gupta, Handbook of Thick and Thin Film Hybrid Microelectronics,  Chapter 8, John Wiley, Hoboken, NJ (2003)CrossRefGoogle Scholar
  166. 166.
    H.B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison Wesley, Reading, MA, Chapter. 3 (1990)Google Scholar
  167. 167.
    M. Mahalingam, J. Andrews, and J. Drye, Thermal pin grid array packages for high density LSI and VLSI logic circuits, IEEE Trans. CHMT, 6 (4), pp. 246 (Sept. 1983)Google Scholar
  168. 168.
    R.F. Pease and O.K. Kwon, Physical limits to the useful packaging density of electronic systems, IBM J. Res. Dev., 32 (5), 636 (Sept. 1985)CrossRefGoogle Scholar
  169. 169.
    R.C. Mehrotra, R. Bhora, and D.P. Gaur, Metal Diketones and Allied Derivatives, Academic Press, London (1978); E. Levy and C. Lopez, J. Adv. Mater. 15 (20), p. 1665 (Oct. 16, 2003)Google Scholar
  170. 170.
    A.E. Kaloyeros, A. Feng, J. Garhart, K.C. Brooks, S.K. Ghosh, A.N. Saxena, and F. Luehrs, Low temperature metal-organic chemical vapor deposition (LTMOCVD) of device quality copper film for microelectronics applications, J. Electron. Mater., 19, 271 (1990)CrossRefGoogle Scholar
  171. 171.
    B. Chapman, Glow Discharge Processes, John Wiley, New York (1980)Google Scholar
  172. 172.
    S. Wolf and R.N. Tauber, Silicon Processing, Vol. I, Lattice Press, Sunset Beach, CA, Chapter 10 (1986)Google Scholar
  173. 173.
    J. Sundqvist, H. Hogberg, and A. Harsta, Atomic layer deposition of Ta2O5 using the TaI5 and O2precursor combination, J. Adv. Mater., 15 (20), 245 (Oct. 16, 2003)Google Scholar
  174. 174.
    T. Suntola, and J. Anston, US patent, 4058430 (1977)Google Scholar
  175. 175.
    A.J. Bard and L.R. Faulkner, Electrochemical Methods: Fundamentals and Applications, 2nd edn. John Wiley, New York (2001)Google Scholar
  176. 176.
    J. Goodisman, Electrochemistry: Theoretical Foundations, Quantum and Statistical Mechanics, Thermodynamics, The Solid State, John Wiley, New York (1987)Google Scholar
  177. 177.
    D.A. MacInnes, The Principles of Electrochemistry, Dover, New York (1947, revised 1961)Google Scholar
  178. 178.
    P.C. Andricacos and L.T. Romankiw, Magnetically soft materials: Their properties and electrochemistry, in H. Gerischer and C.W Tobias (eds) Advances in Electrochemical Science and Engineering, Vol. 3, VCH, New York, pp. 227–321 (1994); and P.C. Andricacos, C. Uzoh, J.C. Dukovic, J. Horkans, and H. Deligiani, Damascene copper electroplating for chip interconnections, IBM. J. Res. Dev., 42 (5), 567 (Sept. 1998)Google Scholar
  179. 179.
    H.S. Nalwa, Handbook of Organic-Inorganic Hybrid Materials and Nanocomposites, Vol. I, American Scientific Publishers, Steven Ranch, CA (2003)Google Scholar
  180. 180.
    A. Tiwari, A. Chugh, C. Chin, and J. Narayan, Role of self-assembled gold nanodots in improving the electrical and optical characteristics of zinc oxide films, J. Nanosci. Nanotech., 3 (5), 368 (2003)Google Scholar
  181. 181.
    R. Saito, G. Dresselhaus, and M.S. Dresselhaus, Physical Properties of Carbon Nanotubes, Imperial College, London (1999); R. Chau et al., Nano Mater. 6, 810 (Nov. 2007)Google Scholar
  182. 182.
    W.A. De Heer, Structure and transport in nanotubes, Nature Mater., 1 (3), 153 (Nov. 2002)CrossRefGoogle Scholar
  183. 183.
    S. Iijim, Helical nanotube of graphite carbon, Nature, 354, 56–58 (1991)CrossRefGoogle Scholar
  184. 184.
    T.W. Ebbessen and P.M. Ajayan, Large scale synthesis of carbon nanotubes, Nature, 358, 220 (1992)CrossRefGoogle Scholar
  185. 185.
    A. Thesis et al., Crystalline ropes of metallic carbon nanotubes (PCNTs), J. Phys. Chem. Solids, 54, 1841 (1993)CrossRefGoogle Scholar
  186. 186.
    S. Amelinckx et al., A formation mechanism for catalytically grown helix shaped graphite nanotubes, Science, 265, 635 (1994)CrossRefGoogle Scholar
  187. 187.
    M. Endo, Grow carbon fibers in vapor phase, Chem. Tech. 18, 568 (1988)Google Scholar
  188. 188.
    R. Martel et al., Appl. Phys. Lett. 73 (17), 2447 (1998)CrossRefGoogle Scholar
  189. 189.
    A. Aviram and M. Ratner, Chem. Phys. Lett., 29, 288 (1974)Google Scholar
  190. 190.
    S.J. Trans et al., Individual single wall carbon nano tubes as quantum wires, Nature, 386, 474 (1977)CrossRefGoogle Scholar
  191. 191.
    M. Bockrath et al., Single electron transport in rope of carbon nanotubes, Science, 275, 1922 (1977)CrossRefGoogle Scholar
  192. 192.
    S.J. Trans. A.R.M. Verschueren, and C. Dekker, Room temperature transistor based on a single carbon nanotube, Nature, 393, 49 (1998)Google Scholar
  193. 193.
    Z. Yao, H. Postma, L. Balents, and C. Dekker Carbon nanotube intermolecular junctions, Lett. Nat., 40 (2), 273 (1999); Y. Kamata, Mater. Today, 11 (1–2), 30 (2008)Google Scholar
  194. 194.
    A.E. Kaloyeros, E.T. Eisenbraun, J. Welch, and R.E. Geer, Exploiting nanotechnology for terahertz interconnect, Semicond. Int. 26 (1), 56 (Jan. 2003)Google Scholar
  195. 195.
    K. Takayanagi, Y. Kondo, and H. Ohnishi, Suspended gold nano wires: Ballistic transport of electrons, Int. J. ISAP, 3 (3) (Jan. 2001)Google Scholar
  196. 196.
    R.A. Webbs, S. Washborn, C.P. Umbach, and R.B. Laibowitz, Phys. Rev. Lett., 54, 2696 (1985)CrossRefGoogle Scholar
  197. 197.
    S. Lijima, Nature, 354, 56 (1991)CrossRefGoogle Scholar
  198. 198.
    M. Bockrath et al., Science, 275, 1922 (1997)CrossRefGoogle Scholar
  199. 199.
    J. Bardeen, L.N. Cooper, and J.R. Schrieffer, Phys. Rev. 108, 1175 (1957)MathSciNetCrossRefGoogle Scholar
  200. 200.
    R.E. Joynson, Superconductive thin films and devices, in L.I. Maissel and R. Glang (eds), Handbook of Thin Film Technology, McGraw Hill, New York, Chapter 22 (1983)Google Scholar
  201. 201.
    M. Tinkham, Documents on Modern Physics, Gorden & Breach, New York (1990)Google Scholar
  202. 202.
    Superconductivity, APS Special Issue, American Physical Society Publishers, New York (1987); also D.K. Brock, E.K. Track, and J.M. Rowel, Superconductor ICs: The 1000-GHz second generation, IEEE Spectrum, 37 (12) (Dec. 2000); and K. Likharev, Superconductors: Computation, Physics World, 10, pp. 39–43 (May 1997)Google Scholar
  203. 203.
    C.W. Chu, P.H. Hor, R.L. Meng, L. Gao, Z.J. Huang, and Y.Q. Wang, Evidence of superconductivity above 40 K in the La-Ba-Cu-O compound system, high temperature superconductivity, Special Issue, Phys. Rev. Lett. 58, 405 (1987)Google Scholar
  204. 204.
    T.K. Gupta, Preparation and characterization of layered superconductors, Phys. Rev. B, 43 (7) (1991)Google Scholar
  205. 205.
    S. Savel’ev and F. Nori, Experimentally anisotropic superconductors, Nat. Mater., 1 (3), 179 (Nov. 2002)CrossRefGoogle Scholar
  206. 206.
    G.D. Anna, Controlling the motion of quanta, Nat. Mater. 1 (3), 143 (Nov. 2002)CrossRefGoogle Scholar
  207. 207.
    G.D. Anna, Controlling the motion of quanta, Nat. Mater. 1 (3), 143 (2003)CrossRefGoogle Scholar
  208. 208.
    R.D. Astumian, Science, 276, 917 (1997)CrossRefGoogle Scholar
  209. 209.
    J. Prost et al., Phys. Rev. Lett., 72, 2652 (1994)CrossRefGoogle Scholar
  210. 210.
    R.J. Gutmann et al., A wafer level 3-D IC technology platform, Adv. Metal. Conf. October 2003, p. 19Google Scholar
  211. 211.
    P. Garrou, C.B. Power, and P. Ramm (eds.), Handbook of 3-D Integration: Technology and Application of 3-D Integrated Circuits, John Wiley, New York (2008)Google Scholar
  212. 212.
    A Klumpp et al., Integration technologies for 3-D systems, Int. Workshop of 3-D System Integration (Dec. 2003)Google Scholar
  213. 213.
    S. Pozder et al., Back end compatibility of bonding and thinning process for wafer level 3-D interconnect technology platform, IEEE IITC, June 2004, p. 102Google Scholar
  214. 214.
    K. Ishimaru, 45/32 nm CMOS Challenge and perspective, 52(9), 1266 (2008)Google Scholar
  215. 215.
    F. Roozeboom et al., Electrochem. Soc. Trans., 3 (15) 173 (2007)Google Scholar
  216. 216.
    J.H. Klootwjik, A. Kemmeren, R. Wolters, F. Roozeboom, J. Verhoeven, and E. van den Heuvel, in, E. Gusev (ed.), Defects in High-K Gate Electric Stacks, Springer, Dordrecht, pp. 17–28 (2006)Google Scholar
  217. 217.
    J. Vardaman, What’s delaying the adoption of 3-D TSV, Semicond. Int. March 2008, p. 80Google Scholar
  218. 218.
    M.A. Blauw, P.J.W. van Lankvelt, F. Roozeboom, M.C.M. van de Sanden, and W.M.M. Kessels, Electrochem. Solid State Lett., 10, H-309 (2007)CrossRefGoogle Scholar
  219. 219.
    Y. Xie, G. Loh, G. Black, and K. Bernstein, Design space exploration for 3-D architecture, ACM J. Emerg. Technol. Comput. Syst., 2 (2), 65 (2006)CrossRefGoogle Scholar
  220. 220.
    J.Q. Lu et al., Wafer level 3-D hyper integration, 20th Int. VLSI Multilevel Interconnect. Conf. 2003, p. 227Google Scholar
  221. 221.
    G. Posada et al., Low pass coupled line filters with transmission zeros in multilayer thin film MCM-D technology, IEEE MTTS-Digest 2004, p. 1471Google Scholar
  222. 222.
    G. Posada et al., Microstrip thin-film MCM-D technology on high resistivity silicon with integrated through substrate vias, Eur. Microw. Week, 37, pp. 8–12 (October 2007)Google Scholar
  223. 223.
    G. Carchon et al., Multilayer thin film MCM-D for the integration of high performance RF and microwave circuits, IEEE Trans. CPT., 24 (3), 29 (2001)Google Scholar
  224. 224.
    A. Stich, Z. Gabric, and W. Pamler, Potential of air gap technology by selective ozones/TEOS deposition: Effects of air gap geometry on dielectric constant, Microelectron. Eng., 82 (3–4), 362 (2005)CrossRefGoogle Scholar
  225. 225.
    B. Shieh, K. Saraswat, M. Deal, and J. Mcvittie, Air gaps lower K in interconnect dielectrics, Solid state technology, 42 (2), 57 (1999)Google Scholar
  226. 226.
    H.J. Lee et al., Structural characteristics of porous low-K thin films prepared by different techniques using x-ray prosimetry, J. Appl. Phys., 95 (5), 2355 (2004)CrossRefGoogle Scholar
  227. 227.
    J. Noguchi et al., Process and reliability of air gap Cu interconnect using 90 nm node technology, IEEE Trans. Electron. Dev., 52 (3), 352 (March 2005)MathSciNetCrossRefGoogle Scholar
  228. 228.
    B. Sheih et al., Air gap formation during IMD deposition to lower interconnect capacitance, IEEE Electron. Dev. Lett. 19 (1) 16 (1998)CrossRefGoogle Scholar
  229. 229.
    M. Lin, C.Y. Chang, T.Y. Huang, and M.L. Lin, A multilevel interconnect technology with internal air gap for high performance 0.25 μm and beyond device manufacturing, JJAP, 38, 6240 (1999)Google Scholar
  230. 230.
    J.P. Gueneau de Mussy, C. Bruynsereade, Z. Tokei, G.P. Beyer, and K. Maex, Proc. IEEE-IITC, 2005, p. 150Google Scholar
  231. 231.
    L. Gosset et al., Microelectron. Eng., 82, 240 (2005)CrossRefGoogle Scholar
  232. 232.
    R.J.O.M. Hoofman et al., Self aligned multilevel air gap integration, Microelectron. Eng., 83 (11–12), 2150 (2006)CrossRefGoogle Scholar
  233. 233.
    V. Arnal et al., IEE IITC 2001, p. 143Google Scholar
  234. 234.
    H. Park et al. Simulation of electrical and mechanical properties of air bridge Cu-interconnects, 44th Annual Int. Reliab. Phys. Symp. San Jose (2006)Google Scholar
  235. 235.
    C.S. Hau-Riege, S.P. Hau-Riege, and A.P. Marathe, J. Appl. Phys. 96, 5792 (2004)CrossRefGoogle Scholar
  236. 236.
    J. Noguchi, K. Sato, N. Konishi, S. Uno, T. Oshima, and K. Ishikawa, IEEE Trans. Electron. Dev., 52, 352 (2005)CrossRefGoogle Scholar
  237. 237.
    R. Daamen, J. Michelon, and V. Nguyenhoang, Alternative to low-K nanoporous materials: Dielectric air gap integration, SST (Aug. 2006)Google Scholar
  238. 238.
    E. Keyes, Intel’s 45 nm device, EE Times pp. 2–5 (Dec. 2, 2007)Google Scholar
  239. 239.
    IEEE, IEDM, Dec. 13–15, San Francisco, CA.,2004Google Scholar
  240. 240.
    P. Singer, 65 nm technology details emerge, Solid State Technology, 27 (10), 30 (2004)Google Scholar
  241. 241.
    P. Homberg, Xilinx, Open Systems Publishing, 2008 Editorial CalendarGoogle Scholar
  242. 242.
    TSMC eNewsletter, Feb. 16, 2007Google Scholar
  243. 243.
    Industry news, Semicond. Int. March 2008, p. 17Google Scholar
  244. 244.
    E. van Setten et al., The flash memory battle: How low can we go? Opt. Microlitho. XXI. 6924, 692441, Proc. SPIE (2008)Google Scholar
  245. 245.
    C. Auth et al., Intel’s 45 nm CMOS Technology, Intel Tech J. 12 (2) 1, June (2008)Google Scholar
  246. 246.
    D. Scansen, Under hood: EE Times, (News-magazine) CMP media LLC. Pub., NY, Nov. 14 (2007)Google Scholar
  247. 247.
    R. Argavani and H. M’Saad, Despite engineering and cost challenges, 32 nm node IC manufacturing within reach, Solid State Technology, 51 (5), 25 (2008)Google Scholar
  248. 248.
    H.S. Yang et al., Dual stress liner for high performance sub-45 nm gate length SOI CMOS manufacturing, IEDM Tech Dig. Dec., p. 1075 (2004)Google Scholar
  249. 249.
    Agravani et al., Strain engineering push to the 32 nm logic technology node, Semiconductor Fabtech, ICG Pub., UK, 32 edition, p. 15 (2007); L. Washington et al., PMOS FET with 200% mobility enhancement induced by multiple stressors, IEEE Trans. Electron. Dev. 27 (6), 511–513 (2006)Google Scholar
  250. 250.
    E.P. Gusev, V. Narayana, and M. Frank, Advanced high-K dielectric stacks with poly-Si and metal gates, IBM J. Res. Dev., 90 (4/5), 387 (2006)CrossRefGoogle Scholar
  251. 251.
    M. Chudzik et al., High performance high-K metal gates for 45 nm CMOS and beyond with gate first processing, in VLSI Tech. Dig., p. 194 (2007)Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  1. 1.Radiation Monitoring Devices, Inc.WatertownUSA

Personalised recommendations