This paper presents a power-efficient high-speed serial interface solution, which is targeted for use in battery-operated mobile or handheld devices. Both transceiver topology and signaling protocol are described. High-speed differential and CMOS signaling are merged on the same wires. The signaling scheme contains link power management features and provides multiple communication modes to adapt efficiently to bandwidth needs. This interface has been implemented in 65nm CMOS and measurement results are shown.
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© 2008 Springer Science + Business Media B.V
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den Besten, G.W. (2008). High-Speed Serial Wired Interface for Mobile Applications. In: Casier, H., Steyaert, M., Van Roermund, A.H.M. (eds) Analog Circuit Design. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8263-4_9
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DOI: https://doi.org/10.1007/978-1-4020-8263-4_9
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-8262-7
Online ISBN: 978-1-4020-8263-4
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