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Analysis of low-IF architectures

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Part of the Analog Circuits and Signal Processing Series book series (ACSP)

Low-IF front-end architectures have the advantages as a high level of integration and flexibility in terms of different standards with respect to single-path architectures. Nevertheless, the analysis of low-IF architectures, which includes the voltage gain, noise, linearity and image rejection analysis, is more complex. Basically, the interaction between the signals and noise from the different paths in a low-IF architecture causes difficulties. Therefore, the analysis and very well-known analytical expressions for the overall frontend noise figure and IIP3 (see appendix A) that are suitable for single path front-end architectures, cannot be applied straightforward for low-IF front-end architectures.

The analysis of the voltage gain, noise, linearity and image rejection in low-IF frontend architectures provides the analytical expressions for the overall voltage gain, noise figure, IIP3 and image rejection of a low-IF front-end. These formulas highlight the contributions of different building blocks to the overall front-end voltage gain, noise figure, IIP3 and image rejection. Also, they suggest trade-offs between the specifications of the different building blocks. Therefore, they are essential for the distribution of the building block specifications in a low-IF front-end.

The organization of this chapter is the following. Section 4.1 presents the analysis of the noise and voltage gain in a low-IF front-end.Next, the linearity and the image rejection analysis are performed in sections 4.2 and 4.3, respectively. At the end, the summary of this chapter is given in section 4.4.

Keywords

Image Signal Noise Factor Output Impedance Noise Voltage Voltage Gain 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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© Springer Science+Business Media B.V 2008

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