Investigation of Compressive Strain Effects Induced by STI and ESL
Two types of mechanical stress, induced by compressive etch stop layer (c-ESL) and/or shallow trench isolation (STI), are examined in advanced p-channel partially depleted SOI MOSFETs. Systematic measurements show that c-ESL significantly enhances the performance of PMOS devices without degrading the short-channel effects. The mechanical stress induced by c-ESL is inhomogeneous through the Si film, decreasing from the top to the bottom interface. We demonstrate that the combination of c-ESL and STI stress is a complex 3-D mechanism, which depends on the layout parameters: channel width (from 0.1 to 1 µm), channel length (down to 23 nm) and source/drain active surface.
KeywordsHole Mobility Gate Length Gate Width Subthreshold Swing Mobility Enhancement
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