Abstract
Custom design and verification of leaf-cells for standard-height and bit-slice libraries can be used to provide students with experience in performing these physical level tasks manually. We describe a one-semester graduate course [1] in which students compare their own custom layouts with automated results in terms of area, delay and design time. The availability of valid automated solutions provides the students with targets that serve as feasible bounds on the layouts and also inspire competition between the student and the design automation software. Projects are combined into TinyChips and submitted for fabrication via MOSIS [2] for testing during the subsequent semester.
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References
ECE 651, University of Tennessee, http://vIsi1.engr.utk.edu/ece/bouldin_courses/
MOSIS, http://www.mosis.org/
Cadence University Program, Cadence Design Systems, http://www.cadence.com/company/university/
Prolific, Inc., http://www.prolificinc.com/
Smartframe and Standard-Cell Library, University of Tennessee, http://vlsi1.engrutk.edu/ece/cadence.html
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© 2004 Springer Science+Business Media Dordrecht
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Bouldin, DW., Tan, C., Patel, KJ. (2004). Teaching Custom and Automated Cell Design. In: Ionescu, A.M., Declercq, M., Kayal, M., Leblebici, Y. (eds) Microelectronics Education. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-2651-5_8
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DOI: https://doi.org/10.1007/978-1-4020-2651-5_8
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-015-7052-7
Online ISBN: 978-1-4020-2651-5
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