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The GATEWAY Gate Array Design Exercise

  • Alan F. Murray
  • H. Martin Reekie
Chapter
Part of the Macmillan New Electronics Series book series

Abstract

GATEWAY is an exercise in Integrated Circuit design that is aimed at pre-final year honours students. The exercise, which is intended to extend over the entire academic year, gives participants a wide variety of experience in the execution of a complete ASIC design cycle. Integrated Circuit design, technology and testing, together with Computer Aided Design (CAD) usage, project management and documentation are all valuable educational areas covered.

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Copyright information

© Alan F. Murray and H. Martin Reekie 1987

Authors and Affiliations

  • Alan F. Murray
    • 1
  • H. Martin Reekie
    • 1
  1. 1.>Department of Electrical EngineeringEdinburgh UniversityUK

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