Multiplication is usually regarded as the second most important arithmetic function. However, statistics suggest that in some large scientific programs it occurs as frequently as addition and subtraction combined. As in the previous chapter, this chapter will discuss the procedures involved in multiplication of two binary ‘bit patterns’, and will not discuss the problems of handling signed numbers. Signed multiplication will be described in chapter 4 in the discussion of the representation of negative numbers.
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- Dadda, L., ‘Some Schemes for Parallel Multipliers’, Alta Freq., 34 (1965) 349–56.Google Scholar
- Gosling, J. B., ‘Design of Large High Speed Binary Multiplier Units’, Proc. I.E.E., 118 (1971) 499–505. First description, as such, of the twin-beat multiplier (termed serial-parallel here). Useful assessment of cost effectiveness of multipliers at that time. Relative figures are still relevant.CrossRefGoogle Scholar
- Kilburn, T., Edwards, D. B. G., and Thomas, G. E., ‘The Manchester Mk II Digital Computing Machine’, Proc. I.E.E., 107B Suppl. 2 (1956) 247–68. An early paper describing a carry-save-adder multiplier, though not by that name.Google Scholar
- Thornton, J. E., Design of a Computer: CDC 6600 (Scott Foresman, Glenview, Ill., 1970).Google Scholar