Abstract
In the previous chapter we described how pipelining and other forms of low-level parallelism could be used to enhance processor performance. Although such techniques can increase performance by a factor of 10 or so, uniprocessor systems continue to be limited by the rate at which instructions can be issued and operands supplied. As VLSI technology has reduced the size and cost of computer components, interconnecting several processors with several memory modules has offered designers the opportunity of building parallel systems with much greater performance characteristics than uniprocessor systems. These parallel architectures also tend to introduce some degree of fault-tolerance, so that if a component or interconnection fails, the system tends to degrade rather than stop. This chapter explores some of these architectures.
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© 1996 B. S. Chalk
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Chalk, B.S. (1996). Parallel Architectures. In: Computer Organisation and Architecture. Macmillan Computer Science Series. Palgrave, London. https://doi.org/10.1007/978-1-349-13871-5_10
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DOI: https://doi.org/10.1007/978-1-349-13871-5_10
Publisher Name: Palgrave, London
Print ISBN: 978-0-333-64551-2
Online ISBN: 978-1-349-13871-5
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