Technological Boundaries of Voltage and Frequency Scaling for Power Performance Tuning

  • Maurice Meijer
  • José Pineda de Gyvez
Part of the Series on Integrated Circuits and Systems book series (ICIR)

In this chapter, we concentrate on technological quantitative pointers for adaptive voltage scaling (AVS) and adaptive body biasing (ABB) in modern CMOS digital designs. In particular, we will present the power savings that can be expected, the power-delay trade-offs that can be made, and the implications of these techniques on present semiconductor techn-ologies. Furthermore, we will show to which extent process-dependent performance compensation can be used. Our presentation is a result of extensive analyses based on test-circuits fabricated in the state-of-the-art CMOS processes. Experimental results have been obtained for both 90 nm and 65 nm CMOS technology nodes.

Adaptive Power Performance Tuning of ICs

The integration density of Integrated Circuits is doubling every 18 months. Soon, advanced process generations will integrate 1 billion transistors on a single chip. Such chips are the heart of a new generation of devices that are changing our daily life fundamentally. Power...


Leakage Current Threshold Voltage Supply Voltage Tuning Range Power Saving 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  • Maurice Meijer
    • 1
  • José Pineda de Gyvez
    • 2
  1. 1.NXP SemiconductorsNXP
  2. 2.Eindhoven University of TechnologyEindhoven

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