Multiple supply voltage design is an effective technique for power minimization in CMOS circuits. Clustered Voltage Scaling (CVS) and Extended Clustered Voltage Scaling (ECVS) are the two major methodologies used for assigning the voltage supply to gates in circuits having dual power supplies. This chapter presents current state of the art approaches that combine CVS and ECVS with threshold voltage assignment and gate sizing to enable the maximum reduction in power dissipation. Later we also present a comparison of achievable power savings using CVS and ECVS and point out that ECVS provides appreciably larger power improvements compared to CVS. However, ECVS rests on the availability of well designed asynchronous level converters. We also quantify the impact of the efficiency of level conversion on power savings.
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Kulkarni, S., Srivastava, A., Sylvester, D., Blaauw, D. (2007). Power Optimization using Multiple Supply Voltages. In: Closing the Power Gap Between ASIC & Custom. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-68953-1_8
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DOI: https://doi.org/10.1007/978-0-387-68953-1_8
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