Placement is a critical component in the physical synthesis design flow of large-scale integrated circuits and is a major contributor to timing closure results. It is often run multiple times during various stages of the physical synthesis flow. In addition, circuit sizes that need to be handled by placement algorithms are steadily increasing to over tens of millions of modules. Hence, it is necessary to have efficient and scalable placement algorithms that can produce high-quality solutions satisfying a variety of design objectives.
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Viswanathan, N., Pan, M., Chu, C. (2007). FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm. In: Nam, GJ., Cong, J. (eds) Modern Circuit Placement. Series on Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-68739-1_8
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