A Layered Approach

Summary

This Chapter talked about layers. We talked about using layers to increase productivity, by managing the complexity of a verification system.

We talked about “ends-in” coding, where you start at the bottom and top of the test and code towards the middle. We considered this technique of looking at the chip and creating Interface layers as the first step in creating a verification system. We then went to the top layer, and talked about the verification top and the three top components: the watchdog timer, the test, and the testbench.

Next, we entered the middle layer, where we talked about using a test component to exercise a particular configuration or data path of a chip interface. The idea that a test really should have several interfaces exercised at once formed the reasoning behind the irritator layer.

We ended the Chapter with a quick tour of a completed test, noting that there are still more decisions to be made as the implementation of the verification system proceeds.

Keywords

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

It is tempting, if the only tool you have is a hammer, to treat everything as if it were a nail.