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Chip Level Testing

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Summary

This chapter took a look at a system-level verification system. We adapted the components from the block-level test.

The first test that was talked, just re-used the test_component from the block-level test on all four UART interfaces.

The next test brought in the concept of irritators, background traffic for a main test focus.

The system-level test quad_uart_vectors was used to show how the template library can be harnessed to make small, efficient standard-form code.

In general, this chapter showed that many of the block-level components could be adapted without modification to the code. We did, however, need to modify the uart_16550_sfm to handle a specific address range.

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© 2006 Springer Science+Business Media, LLC

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(2006). Chip Level Testing. In: Hardware Verification with C++. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-36254-0_15

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  • DOI: https://doi.org/10.1007/978-0-387-36254-0_15

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-25543-9

  • Online ISBN: 978-0-387-36254-0

  • eBook Packages: EngineeringEngineering (R0)

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