Abstract
In this paper, we show that the paradigm of Multiclock Esterel can be effectively used for the design of asynchronously communicating distributed systems. First we show that the protocol used in Multiclock Esterel for the modeling of VHDL can be used for the design of asynchronous interaction of processes, and an analysis can be made relative to speed or periodicity of the underlying processes for a safe implementation without missing any signals. The analysis also shows that one can arrive at a tradeoff between the periodicity and the buffer requirements on the average over a sequence of periods. Then, we illustrate the modeling of communicating reactive processes (which is essentially a network of Esterel nodes communicating via the rendezvous mechanism) as an instance of Multiclock Esterel.
The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: 10.1007/978-0-387-35533-7_26
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© 2000 IFIP International Federation for Information Processing
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Rajan, B., Shyamasundar, R.K. (2000). Modeling Distributed Embedded Systems In Multiclock Esterel . In: Bolognesi, T., Latella, D. (eds) Formal Methods for Distributed System Development. PSTV FORTE 2000 2000. IFIP — The International Federation for Information Processing, vol 55. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35533-7_19
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DOI: https://doi.org/10.1007/978-0-387-35533-7_19
Publisher Name: Springer, Boston, MA
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