Synchronous to Asynchronous Conversion

A Case Study: The Blowfish Algorithm Implementation
Part of the IFIP — The International Federation for Information Processing book series (IFIPAICT, volume 34)


This work introduces a novel methodology that eases the synchronous to asynchronous conversion of existing digital circuits. Synchronous single-phased circuits may have its performance improved with the use of a variable rate clock generator if the conversion is done on some key circuits. This methodology is used to improve the performance of a soft-core implementation of the Blowfish cryptographic algorithm.

Key words

Asynchronous logic cryptography VLSI 


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Copyright information

© IFIP International Federation for Information Processing 2000

Authors and Affiliations

  1. 1.COPPE — Federal University of Rio de JaneiroRioBrazil
  2. 2.IME — Military Institute of EngineeringRioBrazil

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