EXPLORA — Generic Design Space Exploration During Embedded System Synthesis

  • Frank Cieslok
  • Heinrich Esau
  • Jürgen Teich
Part of the IFIP — The International Federation for Information Processing book series (IFIPAICT, volume 61)


The need for design space exploration on different levels of abstraction during synthesis of electronic systems has received wide attention recently. Unfortunately, there are almost no tools available on the EDA market that allow a designer to enhance his synthesis tool suite by design space exploration capabilities easily. A versatile tool for design space exploration must be targetable to different synthesis tools. Also, different optimization (exploration) algorithms should be able to be connected to such a versatile tool. Here, we present an approach that enables design space exploration with support to couple different exploration algorithms and synthesis tools. Our JAVA based tool called EXPLORA is also able to visualize the exploration results and can be adapted to new problems and abstraction levels within hours.


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Copyright information

© IFIP International Federation for Information Processing 2001

Authors and Affiliations

  • Frank Cieslok
    • 1
  • Heinrich Esau
    • 1
  • Jürgen Teich
    • 1
  1. 1.Computer Engineering Lab (DATE)University of PaderbornPaderbornGermany

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