Abstract
In this paper, we present an end-to-end industrial case-study concerning the automatic generation of tests suites for the Cache Coherency Protocol of a Multiprocessor Architecture. It consists of the following stages: (1) formal specification of the architecture using Lotos language, (2) formal description of the test purposes, (3) automatic generation of abstract test suites using the prototype TGV, and (4) automatic generation and analysis of executable test suites. Through the description of each of the previous stages, this paper demonstrates that tools designed for protocol conformance testing can be efficiently used to generate executable tests for hardware concurrent systems.
Chapter PDF
References
J.-C. Fernandez, C. Jard, T. Jéron, and C. Viho. Using on-the-fly verification techniques for the generation of test suites. In A. Alur and T. Hen-zinger, editors, Conference on Computer-Aided Verification (CAV ‘86), New Brunswick, New Jersey, USA, LNCS 1102. Springer, July 1996.
J.-C. Fernandez, C. Jard, T. Jéron, and C. Viho. An experiment in automatic generation of test suites for protocols with verification technology. Science of Computer Programming–Special Issue on Industrial Relevant Applications of Formal Analysis Techniques, 29, p. 123–146, 1997.
L. Doldi, V. Encontre, J.-C. Fernandez, T. Jéron, S. Le Bricquir, N. Texier, and M. Phalippou. Assessment of automatic generation methods of conformance test suites in an industrial context. In B. Baumgarten, H.-J. Burkhardt, and A. Giessler, editors, IFIP TC6 9 th International Workshop on Testing of Communicating Systems. Chapman and Hall, September 1996.
M. Faci and L. Logrippo. Specifying Hardware in LOTOS. In D. Agnew, L. Claesen, and R. Camposano, editors, Proceedings of the 11th International Conference on Computer Hardware Description Languages and their Applications, pages 305–312, Ottawa, Ontario, Canada, April 1993.
G. Chehaibar, H. Garavel, L. Mounier, N. Tawbi, and F. Zulian. Specification and Verification of the PowerScaleTM Bus Arbitration Protocol: An Industrial Experiment with LOTOS. In R. Gotzhein and J. Bredereke, editors, Proceedings of the Joint International Conference on Formal Description Techniques for Distributed Systems and Protocols, and Protocol Specification, Testing, and Verification FORTE/PSTV’96, Kaiserslautern, Germany, October 1996.
J.-C. Fernandez, H. Garavel, L. Mounier, A. Rasse, C. Rodriguez, and J. Sifakis. A Tool Box for the Verification of Lotos Programs. In 14th International Conference on Software Engineering, Melbourne, Australia, May 1992.
H. Garavel and J. Sifakis. Compilation and Verification of LOTOS Specification. In L. Logrippo, R. Probert, and H. Ural, editors, Proceedings of the 10th International Symposium on Protocol Specification, Testing and Verification, pages 379–394, Amsterdam, North-Holland, June 1990.
T. Jéron and P. Morel. Abstraction et déterminisation à la volée: application à la génération de test. In G. Leduc, editor, CFIP’97: Colloque Francophone sur l’Ingénierie des Protocoles, pages 255–270. Hermes, September 1997.
D. Lenoski, J. Laudon, K. Gharachorloo, and J. Hennessy. The Directory-Based Cache Coherency Protocol for the DASH Multiprocessor. Technical Report CSL-TR-89–403, Stanford University, CA 94305+, 1989.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1998 Springer Science+Business Media New York
About this chapter
Cite this chapter
Kahlouche, H., Viho, C., Zendri, M. (1998). An industrial experiment in automatic generation of executable test suites for a cache coherency protocol. In: Petrenko, A., Yevtushenko, N. (eds) Testing of Communicating Systems. IFIP — The International Federation for Information Processing, vol 3. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35381-4_13
Download citation
DOI: https://doi.org/10.1007/978-0-387-35381-4_13
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-6703-2
Online ISBN: 978-0-387-35381-4
eBook Packages: Springer Book Archive