Abstract
The specification of digital logic in SDL (Specification and Description Language) is investigated. A specification approach is proposed for multi-level descriptions of hardware behaviour and structure. The modelling method exploits features introduced in SDL-92. The approach also deals with the specification, analysis and simulation of timing aspects at any level in the specification of digital logic.
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References
A. Olsen, et.al. Systems Engineering Using SDL-92. North Holland, 1994.
ITU-T. Specification and Description Language (SDL), Recommendation Z. 100, International Telecommunications Union, Geneva, 1994.
A. Sarma. Introduction to SDL-92, Computer Networks and ISDN Systems, 28 (12), 1996.
L. Vehaard. An introduction to Z.105, Computer Networks and ISDN Systems, 28 (12), 1996.
ITU-T. Message Sequence Chart, Recommendation Z. 120, International Telecommunications Union, Geneva, 1993.
V. Levin, O. Basbugoglu, E. Bounimova and K. Irian. A bilingual specification environment for software/hardware co-design, Proc. International Symposium on Computer and Information Systems XI, Middle-East Technical University, Ankara, Turkey, 1996.
J. Peeters, M. Jadoul, E. Holz, M.Wasowski, D. Witaszek and J.-P. Delpiroux. HW/SW co-design and the simulation of a multimedia application, Proc. 7th European Simulation Symposium, 1995.
A. Clements. Microprocessor Systems Design, PWS-Kent Publishing Company, 1992
S. Carlson. Introduction to HDL Based Design Using VHDL, Synopsis Inc. [101G. A. McCaskill and G. J. Milne. Hardware description and verification using the CIRCAL system. Research Report HDV-24–92, University of Strathclyde, 1992. [11]G. Csopaki. Hardware description language for specification of digital systems. Periodica Polytechnica, 33 (2), 1989.
]ISO. Information Processing — Open Systems Interconnection — LOTOS — A Formal Description Technique based on the Temporal Ordering of Observational Behaviour, ISO/IEC 8807, International Organization for Standardization, Geneva, 1989.
]K. J. Turner and R. O Sinnott. DILL: Specifying digital logic in LOTOS, in Formal Description Techniques V1, Elsevier Science B.V., 1994.
Telelogic AB. SDT 3.1: Tutorial on SDT Tools, Malmo, Sweden, 1996.
Verilog. ObjectGeode Simulator Reference Manual, Toulouse, France, 1996.
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© 1997 Springer Science+Business Media Dordrecht
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Csopaki, G., Turner, K.J. (1997). Modelling Digital Logic in SDL. In: Mizuno, T., Shiratori, N., Higashino, T., Togashi, A. (eds) Formal Description Techniques and Protocol Specification, Testing and Verification. IFIP — The International Federation for Information Processing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35271-8_23
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DOI: https://doi.org/10.1007/978-0-387-35271-8_23
Publisher Name: Springer, Boston, MA
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