Introduction

Abstract

The integration level of systems is continuously increasing. In many application contexts the target is to reduce the system just to one chip -a socalled System-on-Chip (SoC)-, where different technologies are mixed up (analog, digital, sensors, RF ... ). Designing such systems is undoubtedly a major problem in today microelectronics, because of the inherent complexity of dealing with so heterogeneous technologies. However, another task becoming the real bottleneck of present and future IC projects is how to test those complex and heterogeneous systems in an efficient manner, in terms of test time, cost and proficiency.