Virtual FPGAs: Some steps behind the physical barriers

  • William Fornaciari
  • Vincenzo Piuri
Reconfigurable Architectures Workshop Peter M. Athanas, Virginia Tech, USA Reiner W. Hartenstein, University of Kaiserslautern, Germany
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1388)


Recent advances in FPGA technologies allow to configure the RAM-based FPGA devices in a reduced time as an effective support for real-time applications. The physical dimensions of FPGAs (pinout and gate count) limit the complexity of circuits that can be implemented. In many applications, very large circuits should be realized without requiring either a very large FPGA or many FPGAs; in some real-time systems as well as in multitasking and time-shared environments, it could be valuable to change dynamically the implemented circuit so as to support different applications competing for the FPGA resource. This paper introduces and discusses the concept of Virtual FPGA as an extension of the physical FPGA device: applications have a virtual view of the FPGA that is then mapped on the available physical device by the operating system, in a way similar to the virtual memory.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • William Fornaciari
    • 1
  • Vincenzo Piuri
    • 1
  1. 1.Department of Electronics and InformationPolitecnico di MilanoMilanoItaly

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