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Dynamic reconfiguration of a PMMLA for high-throughput applications

  • Gautam Ghare
  • Soo-Young Lee
Reconfigurable Architectures Workshop Peter M. Athanas, Virginia Tech, USA Reiner W. Hartenstein, University of Kaiserslautern, Germany
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1388)

Abstract

High throughput and dynamic reconfigurability are required in many tasks, especially real-time applications. A logical structure of parallel computing system for such applications is a pipeline of multiprocessor modules in form of a linear array (PMMLA). This paper proposes a scheme to dynamically reconfigure the system by varying the number of processors in each stage of the PMMLA to maintain load balancing among stages.

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References

  1. 1.
    S-Y Lee and Gautam Ghare, “Compact and Flexible Linear-Array-Based Implementations of A Pipeline of Multiprocessor Modules (PMMLA) for High Throughput Applications”, Proceedings of IEEE International Conference on High Performance Computing (HiPC'97), pp. 296–301, 1997.Google Scholar
  2. 2.
    Stuart Green, “Parallel Processing for Computer Graphics”, MIT Press, 1991.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • Gautam Ghare
    • 1
  • Soo-Young Lee
    • 1
  1. 1.Department of Electrical EngineeringAuburn UniversityAuburn

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