Parallel implementation of fractal image compression using multiple digital signal processors
Fractal image compression technique provides very high compression ratios for natural scenes and has the advantage of being resolution independent. However, the encoding process based on the self-similarity search between range and domain blocks is very computationally intensive. This prohibits their real-time application. In this paper, we first propose two parallel schemes and then present one of the parallel implementations on multiple DSP cards. This card is developed for use as a low-cost, general-purpose digital signal-processing card for ISA bus systems. The experimental results show that the proposed parallel implementation yields a significant speedup compared with serial computation. This implementation provides a cost-effective solution for speeding up the fractal image compression and makes it competitive with other methods.
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- M.F. Barnsley, “Fractals Everywhere”, Academic Press, 1988, New York.Google Scholar
- S.K.Chow and S.L.Chan “A Design for Fractal Image Compression using Multiple Digital Signal Processors”, Proc. International Picture Coding Symposium, Melbourne, Australia, Vol. 1, 1996, p.303–308.Google Scholar
- J.E. Hutchinson, “Fractals and Self-similarity”, Indiana Univ. Math. J., Vol.35, 1981, pp. 713–747.Google Scholar
- E. W. Jacobs, Y.Fisher, R.D. Boss, “Image compression: a study of the iterated transform method”, Signal Process. Vol.29, 1992, pp. 251–263.Google Scholar
- A.E. Jacquin, “Fractal image coding: a review”, Proceedings of the IEEE, Vol. 81, 1993, pp. 1451–1465.Google Scholar
- D.M. Munro and F. Dudbridge, “Fractal block coding of images”, Electron. Lett. Vol.28, 1992, pp. 1053–1055.Google Scholar
- TMS320C2x User's Guide, Texas Instruments, 1993. *** DIRECT SUPPORT *** A0008188 00024Google Scholar