A comparison of MPI performance on different MPPs

  • Michael Resch
  • Holger Berger
  • Thomas Boenisch
1 Evaluation and Performance
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1332)


Since MPI [1] has become a standard for message-passing on distributed memory machines a number of implementations have evolved. Today there is an MPI implementation available for all relevant MPP systems, a number of which is based on MPICH [2]. In this paper we are going to present performance comparison for several implementations of MPI on different MPPs. Results for the Cray T3E, the IBM RS/6000 SP, the Hitachi SR2201 and the Intel Paragon are presented. In addition we compare those results to the NEC SX-4, a shared memory PVP.

Results presented will show latency and bandwidth for point-to-point communication. In addition results for global communications and synchronization will be given. This covers a wide range of MPI features used by typical numerical simulation codes. Finally we investigate a core conjugate gradient solver operation to show the behaviour of latency-hiding techniques on different platforms.


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  1. 1.
    Message Passing Interface Forum: MPI: A Message Passing Interface Standard. University of Tennesee, Knoxville, USA, 1995.Google Scholar
  2. 2.
    William Gropp, Ewing Lusk, Nathan Doss, Anthony Skjellum, “A highperformance, portable implementation of the MPI message passing interface standard”, Parallel Computing 22 (1996), 789–828.CrossRefGoogle Scholar
  3. 3.
    Zhiwei Xu, Kai Hwang, “Modeling Communication Overhead: MPI and MPL Performance on the IBM SP2”, IEEE Parallel & Distributed Technology, Spring 1996, 9–23.Google Scholar
  4. 4.
    Kai Hwang, Zhiwei Xu and Masahiro Arakawa, “Benchmark Evaluation of the IBM SP2 for Parallel Signal Processing”, IEEE Transactions on Parallel and Distributed Systems 7 (1996), 522–535.CrossRefGoogle Scholar
  5. 5.
    Shahid H. Bokhari, “Multiphase Complete Exchange on Paragon, SP2, and CS-2”, IEEE Parallel & Distributed Technology, Fall 1996, 45–59.Google Scholar
  6. 6.
    Zhiwei Xu, Kai Hwang, “Early predicition of MPP performance: The SP2, T3D, and Paragon experiences”, Parallel Computing 22 (1996), 917–942.CrossRefGoogle Scholar
  7. 7.
    José Miguel, Augustin Arruabarrena, Ramón Beivide and José Angel Gregorio, “Assessing the Performance of the New IBM SP2 Communication Subsystem”, IEEE Parallel & Distributed Technology, Winter 1996, 12–22.Google Scholar
  8. 8.
    C. Calvin, L. Colombet, “Performance evaluation and modeling of collective communications on Cray T3D”, Parallel Computing 22 (1996), 1413–1427.CrossRefGoogle Scholar
  9. 9.
    R.W. Hockney, “The Communication Challenge for MPP: Intel Paragon and Meiko CS-2“, Parallel Computing 20 (1994), 389–398.CrossRefGoogle Scholar
  10. 10.
    Resch, M., Berger, H., Rabenseifner, R., Boenisch, T.: MPI Performance on the Cray T3E, BI, RUS, 1997.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • Michael Resch
    • 1
  • Holger Berger
    • 1
  • Thomas Boenisch
    • 1
  1. 1.Parallel Computing DepartmentHigh Performance Computing Center StuttgartStuttgartGermany

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