Dedicated hardware processors for a real-time image data pre-processing implemented in FPGA structure

  • Kazimierz Wiatr
Poster Session C: Compression, Hardware & Software, Image Databases, Neural Networks, Object Recognition & Reconstruction
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1311)


This paper presents a dedicated hardware processors implemented in FPGA structure for a fast video image data pre-processing to real time application. Author design and made specialised pipelined multiprocessor architecture for specialised hardware processors. This paper presents specialised hardware processors: median filter, logic processor, look-up-table processor, convolution processor and histogrammer. Dedicated hardware processors implementation in the Xilinx FPGA used another chips. This work is supported by Polish Science Comitee.


Image Processing System FPGA Device FIFO Buffer Master Processor Xilinx FPGA 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • Kazimierz Wiatr
    • 1
  1. 1.Institute of ElectronicsAGH Technical University of CracowCracowPoland

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