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A new hardware structure for implementation of soft morphological filters

  • A. Gasteratos
  • I. Andreadis
  • P. Tsalides
Poster Session I
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1296)

Abstract

A new hardware structure for implementation of soft morphological filters is presented in this paper. This is based on the modification of the majority gate technique. A pipelined systolic array architecture suitable to perform real-time soft morphological filtering is presented as an illustrative example. The processing times of the proposed hardware structure do not depend on the data window size and its hardware complexity grows linearly with the number of its inputs.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • A. Gasteratos
    • 1
  • I. Andreadis
    • 1
  • P. Tsalides
    • 1
  1. 1.Laboratory of Electronics Section of Electronics and Information Systems Technology Department of Electrical and Computer EngineeringXanthiGreece

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