A new hardware structure for implementation of soft morphological filters
A new hardware structure for implementation of soft morphological filters is presented in this paper. This is based on the modification of the majority gate technique. A pipelined systolic array architecture suitable to perform real-time soft morphological filtering is presented as an illustrative example. The processing times of the proposed hardware structure do not depend on the data window size and its hardware complexity grows linearly with the number of its inputs.
Unable to display preview. Download preview PDF.
- Serra, J. (1982). Image Analysis and Mathematical Morphology, Vol. I, Academic Press, N. York.Google Scholar
- Dougherty, E. R., Ed. (1994). Digital Image Processing Methods, Marcel Dekker Inc., N. York.Google Scholar
- Pitas, I. and A. N. Venetsanopoulos (1990). Non-lineal Digital Filters-Principles and Applications, Kluwer Academic Publishers, Boston.Google Scholar
- Lee, C. L. and C. W. Jen (1992). Bit-sliced Median Filter Design Based on Majority Gate, IEE Proc. G, 139 (1),63–71.Google Scholar
- Gasteratos, A., I. Andreadis and Ph. Tsalides. Realization of Rank Order Filters Based on Majority Gate, To appear in Pattern Recognition.Google Scholar