On-the-fly model checking under fairness that exploits symmetry
An on-the-fly algorithm, for model checking under fairness, is presented. The algorithm utilizes symmetry in the program to reduce the state space, and employs new novel techniques that make the on-the-fly modelchecking feasible. The algorithm uses state symmetry and eliminates paralle edges in the reachability graph. Experimental results, demonstrating dramatic reductions in both the running time and memory usage, are presented.
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- [AHU74]Aho, A. V., Hopcroft, J., Ullman, J. D.: The Design and Analysis of Computer Algorithms. Addison-Wesley (1974)Google Scholar
- [BCG95]Bhat, G., Cleaveland, R., Grumberg, o.: Efficient On-the-Fly Modelchecking for CTL. International Conference on Logic in Computer Science, San Diego, California, 1995Google Scholar
- [CES83]Clarke, E. M., Emerson, E. A., Sistla, A. P.: Automatic Verification of Finite State Concurrent Programs, using Temporal Logic: A Practical Approach, Proceedings of the ACM Symposium on Principles of Programming Languages, January 1983, Austin, Texas, Also appeared in ACM TOPLAS, April 1986Google Scholar
- [CFJ93]Clarke, E. M., Filkorn, T., Jha, S.: Exploiting Symmetry in Temporal Logic Model Checking. 5th International Conference on Computer Aided Verification, Crete, Greece, June 1993.Google Scholar
- [ES93]Emerson, E. A., Sistla, A. P.: Symmetry and Model Checking. 5th International Conference on Computer Aided Verification, Crete, Greece, June 1993Google Scholar
- [ES95]Emerson, E. A., Sistla, A. P.: Utilizing Symmetry when Model Checking under Fairness Assumptions: An Automata-theoretic Approach. 7th International Conference on Computer Aided Verification, Leige, Belgium, July 1995Google Scholar
- [G96]Godefroid, P.: Partial-Order Methods for the Verification of Concurrent Systems. Lecture Notes in Computer Science 1032 Springer, 1996Google Scholar
- [HP96]Holzmann, G.J., Peled, D.: The State of SPIN. 8th Intl. Conference on Computer Aided Verification, July 1996Google Scholar
- [ID93]Ip, C. N., Dill, D. L.: Better Verification through Symmetry. Intl. Symposium on Computer Hardware Description Languages and their Application, April 1993. Also in Formal Methods in System Design 9 1/2 (1996) 41–75Google Scholar
- [K94]Kurshan, R. P.: Computer Aided Verification of Coordinated Processes: The Automata Theoretic Approach. Princeton Univerity Press, Princeton NJ (1994)Google Scholar